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In the design the en pin was been connected to a GPIO of Logic chip and vref2 pin been connected to vcc3v3.Now it did not working as a levelshift.What could i do to fixing it as a levelshift . Thanks !
Hello,
This device is not set up correctly for level translation. You have to short the EN pin and VREF2 if you want to use this device for level translation:
The 200K resistor in series is also required in order to limit the current from VCC2 to VCC1. What you'll notice in this diagram is that you can use a 3.3V enable signal to control the EN and VREF2 pin. Then you can pull your SDA2/SCL2 pins up to the 3.3V rail. VREF2 and the SDA2/SCL2 pins do not have to be connected to the same power rail. They can be separate from each other.
Best,
Chris
