Hi,
According to PLX PEX8112 datasheet, we can see the following:
Primary Reset Due to Data Link Down
When the PEX8112 primary bus (PCI Express) remains in standard operation and, for whatever reason, the link is down, the Transaction and Data Link Layers enter the DL_Down state.
The PEX8112 discards all transactions being processed and returns all registers, state machines and externally observable state internal logic to the state-specified default or initial conditions. In addition, the entry of the primary bus (PCI Express) into DL_Down status initiates a reset of the PCI Bus, using the PCIRST# signal.
How about XIO2001? Please let us know the behavior of this above condition.
Thanks and best regards,
M.HATTORI.