DP83867IR: Strap Configuration by resistors

Hi Lucas,

Thanks for information. I have another question. If the front end MAC could ussport Jumbo Frame feature, does the chip could also support it? Do we need any extra setup?

Test condition: 1G Ethernet / RGMII / Enable Jumbo Frame “

Regards,

Roy

Hi Roy,

We're looking into your question and will get back to you on Monday.

Thanks,

Lucas

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Roy,

Only some PHYs support jumbo frames, including the DP83867. No extra setup is necessary to use jumbo frames.

Thanks,

Lucas

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Lucas,

Thanks for information. For its EVM, I'm not sure if we could use general jumper wire to connect J9 to our FPGA due to high speed. Do you have any suggestion?

https://www.ti.com/lit/ug/snlu176/snlu176.pdf?ts=1625024129321&ref_url=https%253A%252F%252Fwww.ti.com%252Ftool%252FDP83867IRPAP-EVM

Regards,

Roy

Hi Roy,

General jumper wires will likely create signal integrity issues, however this should be ok when operating at 10/100 Mbps. For gigabit ethernet, we recommend using either a high speed connector or female headers to shorten the connection.

Thanks,

Lucas

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).