• State Resolved
  • Locked Locked
  • Replies 9 replies
  • Answers 2 answers
  • Subscribers 33 subscribers
  • Views 438 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DP83867IR: Data preamble and SFD

yoshihito takahashi
Prodigy 180 points
Part Number: DP83867IR

Data preamble and SFD

1000BASE-T link-up, RGMII interface.

RXD from DP83867IR to MAC,
I confirmed that it is as follows.
No data (EN = '0'): 1101 1101
Data preamble: 0101 0101 7 bytes
SFD: 1101 0101 1 byte
The preamble on the TXD from MAC to DP83867IR is
How much do you need at least?
Of course, I understand that the standard is ideal.

Even in the following, although it is not stable, is it possible to operate?
No data (EN = '0'): 0000 0000
Data preamble: 0101 0101 1 byte
SFD: 1101 0101 1 byte

Please confirm.

  • 0
    TI__Guru**** 190169 points

    Hello yoshihito takahashi

    Thank you for the query.

    I am trying to understand your question before i can answer.

    Are you looking to reduce the preamble length and operate.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 180 points

    Hello　Sreenivasa　san

    thank you for your reply.

    > Are you looking to reduce the preamble length and operate.
    ⇒ A new problem is occurring.
    The new problem may be on the MAC side,
    To clarify that there is no problem on the PHY side
    I have a question.

    Regards,

    takahashi

  • 0 in reply to yoshihito takahashi
    TI__Guru**** 190169 points

    Hello yoshihito takahashi - san, 

    Thank you for the inputs.

    Did you mention there is some interface issues.

    Do you have a schematics for me to review. Did you consider using the loopback modes to test.

    Sorry, but i could not understand the reply fully.

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 180 points

    Hello　Sreenivasa　san

    thank you for your reply.

    I found out that there is a problem other than PIHY IC.
    I'm curious about how the preamble works with the number of bytes,
    I'm not in a hurry.

    Regards,

    takahashi

  • 0 in reply to yoshihito takahashi
    TI__Guru**** 190169 points

    Hello yoshihito takahashi - san, 

    Thank you for letting me know.

    Was the error related the ethernet interface?

    Regards,

    Sreenivasa

  • 0 in reply to Kallikuppa Sreenivasa
    Prodigy 180 points

    Sreenivasa　san

    thank you for your reply.

    The error I contacted the other day is There was a cause on the MAC side.

    I would like to reconfirm the preamble and SFD.

    Cable → RJ45 → DP83867IR → MAC

    Cable ← RJ45 ← DP83867IR ← MAC I

    n the case of the above connection

    RJ45 ⇔ DP83867IR

    DP83867IR ⇔ MAC

    Is the DP83867IR aware of preambles and SFDs when transmitting data? Data from MAC (including preamble and SFD) Or is it just passing through the data from RJ45 (including preamble and SFD) as it is? Please confirm.

    Regards,

    takahashi

  • 0 in reply to yoshihito takahashi
    TI__Guru**** 190169 points

    Hello yoshihito takahashi - san, 

    Thank you for the inputs.

    I could not completely understand your question.

    Based on my understanding the EPHY is a transceiver and does not do any error checking functions.

    There is a 1588 SFD that is done in the PHY but not sure if customer is using the function.

    Regards,

    Sreenivasa 

  • +1 in reply to Kallikuppa Sreenivasa
    Prodigy 180 points

    thank you for your reply.

    > I could not completely understand your question.

    ⇒Please check the attached image.

    The hardware configuration you are currently testing.
    Data entered in the board① the (data in) and processed in the FPGA,
    If you check the output data, it could not be received.
    So I, to prepare the board②, enter the output data it is determined that the error in dp83867ir③, was confirmed.
    A comparison of the check points ① and check point ②,
    There was a difference only in SFD.
    (An oscilloscope satisfying the sampling rate)

    Cause it is determined that the error is, we believe to be in the SFD.

    Why, it is whether the investigation in the SFD becomes abnormal.

    RGMII delay settings in dp83867ir②, as of the accompanying image,

    Adjusted and, we believe there is no problem.
    (The first place because it has successfully received other than the SFD in dp83867ir③,
    I don't think there is a delay problem. )

    Only, the anxious,
    The preamble is what 1 byte and short.

    > Based on my understanding the EPHY is a transceiver and does not do any error checking functions.

    ⇒ I am also so understanding.
    Thus, the above-mentioned problems, and that the preamble is short
    It is that there is no relationship.

    > There is a 1588 SFD that is done in the PHY but not sure if customer is using the function.

    Register settings related to ⇒1588 SFD does not conduct.
    Do not use.

    If you have any advice, please

  • +1 in reply to yoshihito takahashi
    TI__Guru**** 190169 points

    Hello yoshihito takahashi - san, 

    Thank you for the detailed explanation.

    Regarding the  preamble being 1 byte, i do not  have any comments.

    Regards,

    Sreenivasa