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TFP410: Recognizable resolution and period

hiro kihara
Prodigy 10 points
Part Number: TFP410 
Let me ask you two questions below.

①
If I input an irregular resolution and frame rate to the TFP410, will the TMDS encoding be an error and will not be output?

For example, in the case of 480x 272, the pixel clock is 25MHz or less, so take a lot of blank period.
If a signal such as adjusting the pixel clock to 25Mhz or higher is input, no video will be output even if a DE signal is input with the hardware PIN setting.

However, it is output when I2C is set to generate DE.

From the CVT standard, the polarities of HSYNC and VSYNC change depending on the resolution and refresh rate.
Input signal analysis is included internally,
I think it is an error, but is it interpreted correctly?

②
Even with an irregular resolution refresh rate, if it is set to generate DE with I2C, it will be encoded according to the set register, so
I think that the image will be displayed if the Display side supports it.

Is this the correct way to use TFP410?
  • +1
    TI__Guru**** 177926 points

    Hi,

    Please refer to section 7.4.5 DE Generator for more detail

    When the DE generator is used, the active data location is determined by the counts from HSYNC and VSYNC as described in the "DE Generator" section of the datasheet and the register description.

    The TFP410 does not move the pixel data to the defined edge of DE; it simply selects between the sync and control inputs and the pixel data inputs for DVI encoding. Note that the total line pixel count is limited by the register sizes when using DE generator.

    Please note the DE generator function has a limitation which limits its use in high pixel count formats. The DE_DLY and DE_CNT values are limited by DE_DLY + DE_CNT < 2047. For resolutions where the timing allows, it may be possible to work around this limitation by using the inactive edge of HSYNC as the starting point for DE_DLY. Appropriate timing allowances may be needed for the vertical count starting location.

    Thanks

    David

  • +1 in reply to David (ASIC) Liu
    Prodigy 10 points

    Thank you for your reply.

    I understand the DE generator.

    How do you determine the polarity of HYSYNC and YSYNC when you do not use the DE generator?

     

  • +1 in reply to hiro kihara
    TI__Guru**** 177926 points

    Hi,

    The HSYNC and VSYNC polarity would depend on the RGB signal generator polarity.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Prodigy 10 points

    Thanks

    I understand that TFP410 determines polarity.