SN65DPHY440SS: schematic check

GARETH OU

Guru 11365 points

Part Number: SN65DPHY440SS

1.Could you help check the SN65DPHY440SS schematic as below and any need to adjust ?

2.In addition 1/2 PIN (lane0) input can be changed to other lane3

Thanks

over 4 years ago

0 David (ASIC) Liu over 4 years ago

TI__Guru**** 176281 points

Hi,

Is this a MIPI DSI or CSI-2 design?

Thanks

David

0 GARETH OU over 4 years ago in reply to David (ASIC) Liu

Guru 11365 points

Hi David

Yes, 2 sets of DSI, 1 set of CSI

Thanks

0 David (ASIC) Liu over 4 years ago in reply to GARETH OU

TI__Guru**** 176281 points

Hi,

For MIPI DSI, one of the four lanes is used for back channel communications between GPU and DSI panel. DPHY440’s lane 0 is the only lane that supports the back channel. For this reason, DPHY440 lane 0 must always be connected to lane 0 of GPU and panel.

For MIPI CSI-2, because lane 0 is special lane, I will use lane 1, 2, or 3, and not use lane 0.

Thanks

David

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SN65DPHY440SS: schematic check