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DS90UB941AS-Q1: Does it support Left/Right format transmission in 941-948 2-lane FPD-Link III Input, Dual OpenLDI Output

Zirui Su
Expert 5340 points
Part Number: DS90UB941AS-Q1

Hi team 

I would like to ask that does 941 support left/right format transmission in 941-948 2-lane FPD-LINK III input, Dual link OpenLDI output mode, since the 948 datasheet directly said the data will split into odd and even pixel which means it will pass signal in odd/even mode:

So I need your confirm that does 941 could use Left/Right format transmission in the mode above with 948? What should I configure if I want to use Left/Right format transmission? Thank you.

  • 0
    TI__Mastermind 25765 points

    Hi,

    If you are referring to the Left/Right 3D Format as described in section 8.4.4.1 of the 941AS datasheet, yes the 941 will support Left/Right format in 941-948 2-lane FPD-LINK III input, Dual link OpenLDI output mode. To enable Left/Right 3D processing on the 941, you will need to program the BRIDGE_CFG2 Register (0x56) bit 7 to enable this mode. You can program theFPD3_TX_MODE bits in the DUAL_CTL1 register (0x5B) to enable Forced Dual FPD-Link III Transmitter mode.

    Regards,

    Ben Dattilo

  • 0 in reply to Ben Dattilo
    TI__Expert 5340 points

    Hi Ben

    Sure I understand that we could configure the 0x56 register to using left/right 3d format. I would like to specify the 941-948 link mode:

    2-lane FPDlink III input, dual link OpenLDI output. Under this link mode, I want 941 to generate left/right 3D format video, is it feasible or should I configure some registers in 948? In another way to say, if I have configured the 941 0x56 register to generate left/right 3D format video, could 948 directly receive the left/right format pictures without configuring anything? Thank you

  • 0 in reply to Zirui Su
    TI__Mastermind 25765 points

    Hi,

    Thanks for the clarification. By default, the 948 will autodetect what input mode it is using based on the received data from the serializer. You can change this to force Dual Link or Single Link in the DUAL_RX_CTL register (0x34).

    Regards,

    Ben