DP83867IR: DP83867IRRGZR VIL levels at 1V8 IO

Hi Tom,

What current level is VOL spec given for your FPGA?

Thanks,

Lucas

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Lucas,

Thanks for your supply, sorry for the delayed response I was sick for some days. The FPGA used is a Xilinx Zynq XCZU5EG, no specific current is specified here.

It also seems strange to me that there is such a large jump in VIL voltage of the DP83867 when comparing the levels at different IO supply voltages:

VIL @3.3V = 0.7V; VIL @2.5V = 0.7V; VIL @1.8V = 0.2*VDDIO = 360mV

The 360mV just seems really low for VIL max, keeping typical VOL max of devices operating at 1.8V in mind.

Kind regards,

Tom

Hi Tom,

I've reached out internally regarding your question and will get back to you soon.

Thanks,

Lucas

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).