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XIO2001: XIO2001 Specifications

Part Number: XIO2001

Hi,

Please tell me the following specifications of XIO2001 corresponding to PEX8112.

<<Recommended Operating Conditions>>
 ・VN - Negative Trigger Voltage [V] (3.3V buffer) (Min, Max)
 ・VN - Negative Trigger Voltage [V] (5V tolerant buffer(PCI)) (Min, Max)
 ・VP - Positive Trigger Voltage [V] (3.3V buffer) (Min, Max)
 ・VP - Positive Trigger Voltage [V] (5V tolerant buffer(PCI)) (Min, Max)

<<Power Consumption>>
 ・IVDDSERDES - SerDes(PLL, Receiver, Tranceiver, Analog) Supply Current [mA] (Typ, Max)
 ・IVDDQ - 3.3V I/O Supply Current [mA] (Typ, Max)
 ・IVDD5 - 5V PCI I/O Clamp Supply Current [mA] (Typ, Max)

<<PCI Express AC and DC Electrical Charactersrics>>
 ・Rx Differential input Amplitude [V] (Min, Max)

<<PCI Express Reference Input DC Clock Specifications>>
 ・VCROSS - Absolute Crossing Point Voltage [mV] (Min, Max)

<<PCI Express REFCLK AC Specifications>>
 ・TR/TF - Input Clock Rise/Fall Times [RCUI:refers to the Reference Clock periof (10ns typical)] (Max)
 ・RTERM - Reference Clock Defferential Termination [Ω] (Typ, Max)

<<PCI Bus DC Specifications>>
 ・CIN - Input Capacitance [pF] (XIO2001IPNP) (Max)

<<PCI Bus 33-MHz AC Specifications>>
 ・TCYC - PCI CLK Cycle Time [ns] (Min, Max)
 ・TVAL(ptp) - CLK to Signal Valid Delay - Point-to-Point [ns] (/REQ and /GNT) (Min, Max)
 ・TRST - Reset Active Time after Power Stable [ms] (Min)
 ・TRST-CLK - Reset Active Time after CLK Stable [us] (Min)
 ・TRST-OFF - Reset Active to Output Float Delay [ns] (Max)
 ・TRHFA - RST♯High to First Configuration Access [clocks] (Min)
 ・TRHFF - RST♯High to First FRAME♯Assertion [clocks] (Min)

<<PCI Bus 66-MHz AC Specifications>>
 ・TCYC - PCI CLK Cycle Time [ns] (Min, Max)
 ・TVAL(ptp) - CLK to Signal Valid Delay - Point-to-Point [ns] (/REQ and /GNT) (Min, Max)
 ・TRST - Reset Active Time after Power Stable [ms] (Min)
 ・TRST-CLK - Reset Active Time after CLK Stable [us] (Min)
 ・TRST-OFF - Reset Active to Output Float Delay [ns] (Max)
 ・TRHFA - RST♯High to First Configuration Access [clocks] (Min)
 ・TRHFF - RST♯High to First FRAME♯Assertion [clocks] (Min)

<<Serial EEPROM DC Specifications>>
 ・IOL - Output Current,Low(VOL = 0.4V) [mA] (Typ, Max)
 ・IOH - Output Current,High(VOH = 2.4V) [mA] (Typ, Max)
 ・CIN - Input Capacitance [pF] (XIO2001IPNP) (Max)

<<Serial EEPROM AC Specifications>>
 ・TCYC - EECLK Cycle Time [ns] (Min)
 ・TVAL - EECLK to Output Signal Valid [ns] (Min, Typ)
 ・TSU - Input Setup to EECLK [ns] (Min)
 ・THOLD - Hold Time of Input after EECLK [ns] (Max)

<<GPIO DC Specifications>>
 ・IOL - Output Current,Low(VOL = 0.4V) [mA] (Typ, Max)
 ・IOH - Output Current,High(VOH = 2.4V) [mA] (Typ, Max)
 ・CIN - Input Capacitance [pF] (XIO2001IPNP) (Max)

<<GPIO AC Specifications>>
 ・TVAL - PCLKI to Output Signal Valid [ns] (GPIO0) (Min, Max)
 ・TVAL - PCLKI to Output Signal Valid [ns] (GPIO1) (Min, Max)
 ・TVAL - PCLKI to Output Signal Valid [ns] (GPIO2) (Min, Max)
 ・TVAL - PCLKI to Output Signal Valid [ns] (GPIO3) (Min, Max)

Thanks and best regards,
 T.INOUE.

  • Greetings Takeshi-San,

    The only characterized or validated data are noted in data sheet. Further, PCIe standard specifies certain parameters such PCI clock frequency parameters. XIO2001 is compatible with this standard and its parameters. Please refer to the data sheet for available limits on different parameters.

    Regards ,, nasser