Hi,
This is basic question.
*1. When /SERIRQ pin is pull-down (SERIRQ disable), can customer use INTA-D interrupt?
*2. Can user configure XIO2001 as PCIe GEN1 device?
Please advise us.
Thank and best regards,
M.HATTORI.
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Hi,
This is basic question.
*1. When /SERIRQ pin is pull-down (SERIRQ disable), can customer use INTA-D interrupt?
*2. Can user configure XIO2001 as PCIe GEN1 device?
Please advise us.
Thank and best regards,
M.HATTORI.
Hi Hattori-San,
1). /SERIRQ and INT[D:A] are different from one another.
INT[D:A] inputs are asynchronous to the PCI bus clock and will detect state changes if PCI bus clock is stopped. Interrupts that are not used should be tied together through a single resistor and tied to Vccp.
On the other hand /SERIRQ is synchronous to the PCI bus clock and is used for serializing the 16 ISA interrupts. Note SIRQ edge control register in data sheet(0xE0 & 0xE2).
2). XIO2001 runs at 2.5 Gbps X1 link and complies with PCIe base specification Revision 2.0.
Regards ,, Nasser