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DS90UB929-Q1: I2C EDID Updating

  • Hello Alan,

    Can you share the script that you are using to try and program the SRAM?

    Best Regards,

    Casey 

  • Thanks for your reply.

    Hope pseudo code is reasonable.

    To read the EDID (which is working as the results match the data sheet 100% for all 256 default EDID bytes):

    Write 0x00 to ADR0_0x49.

    Loop the following 256 times:

    {Write 0x0F to APB_CTL_0x48

    Read data from APB_DATA0_0x4B}

    This includes all the expected acks and restarts on the I2C.

    For writing to the EDID I have attempted single writes and multiple (using the auto increment).  Below is what I'm trying for multiple:

    Write 0x00 to ADR0_0x49.

    Loop the following n times (I was initially trying n=8 writes to verify):

    {Write 0x0D to APB_CTL_0x48

    Write EDID[n] to APB_DATA0_0x4B}

    Again, I'm seeing all the expected acks and looping without exception.

    I feel that there must be something easy I'm missing.

    Thanks.

  • Hello Alan,

    This process looks correct - I tried it out on an EVM and don't see any problems. Can you let me know what your MODE_SEL strapping is set to?

    Best Regards,

    Casey

  • Both Mode_Sel0 and Mode_Sel1 are pulled low.  Verified both are at 0VDC.

    Not pertinent to your question, but just in case: IDX is set to a divider (per data sheet): 82.5K to 3.3VDC and 102K to ground resulting in .986VDC. This is for an 8-bit address of 0x28.

    Thanks,

    Alan

  • Alan,

    Ok, I'm really stumped on why this doesn't work for you then. Can you send your full script and I can run in on our EVM HW to see if I see what you see?

    Best Regards,

    Casey 

  • As I'm running a single master I2C bus from an NXP LPC, not sure what I can send that would work on your EVM.

    So to summarize so far, there is nothing that unlocks writing to the EDID or commits the written data to the EDID?  Making changes is truly as simple as it sounds?

    I find it interesting that setting the Read flag in Ctrl is important for reading, but there is no such hurdle to write?

    I have yet to try to send updates to the EDID slave I2C at 8-bit address 0xA0 and not use auto increment.  I suppose to use this, I'd have to loop through writing the EDID index and then writing the data...so not much advantage over auto increment?

  • Hello Alan,

    I'm not aware of anything that would lock the SRAM from being accessed. Are you programming anything else before this though? We could review that if needed. By the way I tried with and without auto-increment and neither showed this type of problem using the process you described 

    Best Regards,

    Casey 

  • I wish I had something wise to report, but sheepishly finally found a bug in the code.  EDID programmed as expected.  Thanks for your time.