Other Parts Discussed in Thread: , TUSB322I
Hi team,
When TUSB321 is used to detect VBUS, how can we inform CPU if we detect VBUS? What feedback signals do we have?
Thank you very much for your help.
Best regards,
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Hi Malik,
Thank you for your reply.
I didn't understand your reply. Is this related to the state of port? Can you explain it in detail?
When sink is detected, when VBUS is detected, what signal output notice does CPU have attached? Are they OUT1 and OUT2 signals?
Best regards,
I need to know PORT state to provide correct comment. VBUS behavior is different based on the DFP or UFP. In UFP there is no signal to communicate VBUS is high. OUT1/2 are not directly coupled to VBUS.
Hi Malik,
Thank you for your time.
How do I know that port is attached when UFP is used as port? In UFP, how do you notify CPU when VBUS is high level?
Thanks a lot.
Best regards,
It is not in UFP mode with TUSB321AI. If this feature is desired I recommend using TUSB322I in I2C to monitor ATTACHED_STATE bit.
1.As described in the datasheet,OUT1 = High OUT2 = High (unattached) or Low (attached) is that VBUS is high,then OUT2 is low(attached),is it right?
Hi Malik,
Thank you for your reply.
Wei is my final customer. He directly asked questions. Please help to answer it . It's more efficient.
Thanks a lot.
Best regards,
1. OUT1/2 status is determined by connected CC Rp in UFP mode. It is not directly related to Vbus however OUT1 = High OUT2 = High (unattached) does indicate a unattached state. If you only want to determine if DFP/DRP is connected or not then OUT1 and OUT 2 should be used. Single OUTx pin would be ambiguous.
2. TUSB321AI does support UFP. I mean that ID signal is a no care in UFP mode.
3. VBUS detect circuit is for our internal state machince to determine attachment in UFP mode however this detect state is not directly communicated outside the device in UFP mode.
As you mentioned that OUT1/2 status is determined by CC,not directly related VBUS, If you only want to determine if DFP/DRP is connected or not then OUT1 and OUT 2 should be used.VBUS detect state is not directly communicated outside the device in UFP mode.
In my application, in UFP mode how to konw whether DFP/DRP is connected or not for my CPU?It need to detect both CC and VBUS.Detecting CC can though by OUT1 and OUT2.But My CPU donot konw VBUS state.
If you do not need to know VBUS voltage level but only power capability of DFP/DRP then OUT1 and OUT2 would work here. A compliant DFP/DRP port will provide VBUS when UFP termination is detected. CPU can also directly measure voltage divider level at the VBUS_DETECT pin.
Keep in mind that TUSB322I can communicate all this information through I2C registers. TUSB322I can be UFP controller in I2C mode.
As you mentioned that VBUS detect circuit is for our internal state machince to determine attachment in UFP mode however this detect state is not directly communicated outside the device in UFP mode.
why does TUSB321AI internal state machince need to determine attachment in UFP mode? I donot understand what is the function of the VBUS detection circuit if this detect state is not directly communicated outside? Can you help me explain it in detail?
We have purchased TUSB321AI,so we want to prioritize it.
The VBUS detection is used to validate proper connection/disconnect from the receptacle. It is also used in our state machince to know when to update DIR, OU1 and OUT2 (for valid connection). IT is also required by USB-C spec to use VBUS for internal state machince transitions. Do you power your system from all states of VBUS capacity or just 1.5A/3A?
As TUSB321 datasheet mentioned that OUT1 = High OUT2 = High (unattached) or Low (attached) in UFP mode.
In UFP mode, under what conditions OUT1 = High OUT2 = High (unattached),under what conditions OUT1 = High OUT2 = Low (attached)?
Many thanks.
OUT1/2 are updated based on the connected CC termination after VBUS goes high and is validated to be a valid connection. If you do not need to know VBUS voltage level but only power capability of DFP/DRP after attachment then OUT1 and OUT2 would work here.
If detecting both CC termination and VBUS goes high, then OUT1 = High OUT2 = Low (attached) .Is it right?
Many thanks.