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DS90UB924-Q1EVM: when connected to 927, 924 can't receive i2s sclk signal

Cathy Cai
Prodigy 360 points
Part Number: DS90UB924-Q1EVM
Other Parts Discussed in Thread: ALP

Hi,

I am studying 92x products recently, and I want to transfer I2S signal through FPD-Link.

I use 924EVM and 927EVM pair to transmit i2s signal through FPD-link, but I can't get the SCLK signal from 924 side. 

I have successfully received  WC and data signal in 924 side except SCLK, though I use the same configuration for the related pins.

I have checked the sclk waveform in 927 side which is OK, but no waveform shows in CLK pin in 924.

WC and DATA signals show in both side are the same and correct.

Could please help solve such problems?

Thanks.

The following is my configuration for 924

Register Display - ALP Nano 1 - DS90UB924, Connector 1

Register Data Name
0x0000 0x58 I2C Device ID
0x0001 0x04 Reset
0x0002 0x00 General Configuration 0
0x0003 0xF0 General Configuration 1
0x0004 0xFE BCC Watchdog Control
0x0005 0x1E I2C Control 1
0x0006 0x00 I2C Control 2
0x0007 0x36 Remote ID
0x0008 0x00 SlaveID[0]
0x0009 0x00 SlaveID[1]
0x000A 0x00 SlaveID[2]
0x000B 0x00 SlaveID[3]
0x000C 0x00 SlaveID[4]
0x000D 0x00 SlaveID[5]
0x000E 0x00 SlaveID[6]
0x000F 0x00 SlaveID[7]
0x0010 0x00 SlaveAlias[0]
0x0011 0x00 SlaveAlias[1]
0x0012 0x00 SlaveAlias[2]
0x0013 0x00 SlaveAlias[3]
0x0014 0x00 SlaveAlias[4]
0x0015 0x00 SlaveAlias[5]
0x0016 0x00 SlaveAlias[6]
0x0017 0x00 SlaveAlias[7]
0x0018 0x00 Mailbox[0]
0x0019 0x01 Mailbox[1]
0x001B 0xF4 Frequency Counter
0x001C 0x03 General Status
0x001D 0x25 GPIO0 Config
0x001E 0x55 GPIO1 and GPIO2 Configuration
0x001F 0x00 GPIO3 Configuration
0x0020 0x00 GPIO_REG5 and GPIO_REG6 Configuration
0x0021 0x22 GPIO_REG7 and GPIO_REG8 Configuration
0x0022 0x52 Data Path Control
0x0023 0x10 Rx Mode Status
0x0024 0x08 BIST Control
0x0025 0x00 BIST Error
0x0026 0x83 SCL High Time
0x0027 0x84 SCL Low Time
0x0028 0x00 Data Path Control 2
0x0029 0x00 FRC Control
0x002A 0x00 White Balance Control
0x002B 0x04 I2S Control
0x0035 0x00 AEQ Control
0x0039 0x00 PG Internal Clock Enable
0x003A 0x00 I2S DIVSEL
0x003B 0x03 Adaptive EQ status
0x0041 0x03 Link Error Count
0x0044 0x60 Adaptive Equalizer Bypass
0x0045 0x88 Adaptive EQ MIN/MAX
0x0049 0x00 Map Select
0x004B 0x08 LVDS Setting
0x0056 0x08 Loop-Through Driver
0x0064 0x10 Pattern Generator Control
0x0065 0x00 Pattern Generator Configuration
0x0066 0x00 PGIA
0x0067 0x00 PGID
0x006E 0x00 GPI Pin Status 1
0x006F 0x00 GPI Pin Status 2
0x00F0 0x5F RX ID
0x00F1 0x55 RX ID
0x00F2 0x42 RX ID
0x00F3 0x39 RX ID
0x00F4 0x32 RX ID
0x00F5 0x38 RX ID

Regards,

Cathy

  • 0
    TI__Guru 60595 points

    Hi Cathy, 

    Can you measure anything coming from the MCLK pin? I see the I2S setting registers are all default values, by default the MCLK frequency should be x2 of the I2S_CLK frequency 

    What sample rate, word size and I2S_CLK is being input on Ser side?

    Cathy Cai said:
    0x002B 0x04 I2S Control

    0x2B[7] - I2S PLL Override: 0b - PLL override disabled (default)

    0x2B[6] - I2S PLL Enable: 0b - I2S PLL is on for I2S data jitter cleaning (default)

    0x2B[0] - I2S Clock Edge: 0b - I2S Data is strobed on the Falling Clock Edge (default)

    Cathy Cai said:
    0x003A 0x00 I2S DIVSEL

    0x3A[7] - MCLK Div Override: 0b - No override for MCLK divider (default)

    0x3A[6:4] - MCLK Div: 000b 

    Regards, 

    Logan

  • 0 in reply to Logan Cummins
    TI__Prodigy 360 points

    Hi Logan,

    Thanks for your reply.

    I can measure the mclk from the 924 side. As the default configuration, the mclk is twice frequency of the SCLK.

    If I set 0x3A[6:4] - MCLK Div: 011b, MCLK will be four times than SCLK. The mclk signal is correct.

    The i2s signal input in 927 side is as follows:

    SCLK 3.072MHz in 927EVM JP3 clk and GND 

    WC 48kHz  in 927EVM JP3 WC and GND

    32bit data in 927EVM JP3 DA and GND

    In 924 side, I have measured these signals:  

    1) 48kHZ WC signal  in 924EVM JP3 IO1 and GND ( WC signal can be measured from IO0 instead of WC, no waveform shows in WC)

    2) 32bit data , the same as input, in 924EVM JP3 IO0 and GND or DA and GND (these two pins IO0 and DA show same data signal)

    3) 6.143MHz or 12.28MHz MCLK as different configuration in 924EVM JP3 MCLK and GND

    4) no signal shows in other pins ( CLK pin, WC pin, DB,DC,DD) 

     

    Regards,

    Cathy

  • 0 in reply to Cathy Cai
    TI__Prodigy 360 points

    Here is the configuration of ser

    Register Display - ALP Nano 1 - DS90UB927, Connector 1

    Register Data Name
    0x0000 0x36 I2C Device ID
    0x0001 0x00 Reset
    0x0003 0xDA General Configuration
    0x0004 0x80 Mode Select
    0x0005 0x00 I2C Master Config
    0x0006 0x58 DES ID
    0x0007 0xA0 SlaveID[0]
    0x0008 0xB0 SlaveAlias[0]
    0x000A 0x00 CRC Errors
    0x000B 0x00 CRC Errors
    0x000C 0x01 General Status
    0x000D 0x23 GPIO[0] Config
    0x000E 0x33 GPIO[1] and GPIO[2] Config
    0x000F 0x00 GPIO[3] Config
    0x0010 0x00 GPIO[5] and GPIO[6] Config
    0x0011 0x00 GPIO[7] Config
    0x0012 0x12 Datapath Control
    0x0013 0x10 General Purpose Control
    0x0014 0x00 BIST and DOPL Control
    0x0015 0x00 Reserved
    0x0016 0xFE BCC Watchdog Control
    0x0017 0x1E I2C Control
    0x0018 0xA1 SCL High Time
    0x0019 0xA5 SCL Low Time
    0x001A 0x00 Datapath Control 2
    0x001B 0x00 BIST BC Error Count
    0x001C 0x00 GPI Pin Status 1
    0x001D 0x00 GPI Pin Status 2
    0x001F 0xF5 Reserved
    0x0020 0x03 Deserializer Capabilities 1
    0x0021 0x00 Deserializer Capabilities 2
    0x0022 0x25 Reserved
    0x0023 0x00 Reserved
    0x0024 0x00 Reserved
    0x0025 0x00 Reserved
    0x0026 0x00 Link Detect Control
    0x0027 0x00 Reserved
    0x0028 0x00 Reserved
    0x0029 0x24 Reserved
    0x002A 0x00 Reserved
    0x002B 0xA0 Reserved
    0x002C 0x00 Reserved
    0x0030 0x03 Reserved
    0x0031 0x10 Reserved
    0x0032 0x00 Reserved
    0x0033 0x00 Reserved
    0x0034 0x00 Reserved
    0x0035 0x00 Reserved
    0x0036 0x08 Reserved
    0x0037 0x00 Reserved
    0x0038 0x00 Reserved
    0x0039 0x0A Reserved
    0x003A 0x20 Reserved
    0x003B 0x20 Reserved
    0x003C 0x00 Reserved
    0x003D 0x00 Reserved
    0x003E 0x00 Reserved
    0x003F 0x00 Reserved
    0x0040 0x00 Reserved
    0x0041 0x00 Reserved
    0x0042 0x00 Reserved
    0x0043 0x00 Reserved
    0x0044 0x00 Reserved
    0x0045 0x00 Reserved
    0x0046 0x00 Reserved
    0x0050 0x20 Reserved
    0x0064 0x10 PGCTL
    0x0065 0x00 PGCFG
    0x0066 0x0B PGIA
    0x0067 0x05 PGID
    0x0068 0x30 Reserved
    0x0069 0x00 Reserved
    0x0070 0x00 SlaveID[1]
    0x0071 0x00 SlaveID[2]
    0x0072 0x00 SlaveID[3]
    0x0073 0x00 SlaveID[4]
    0x0074 0x00 SlaveID[5]
    0x0075 0x00 SlaveID[6]
    0x0076 0x00 SlaveID[7]
    0x0077 0x00 SlaveAlias[1]
    0x0078 0x00 SlaveAlias[2]
    0x0079 0x00 SlaveAlias[3]
    0x007A 0x00 SlaveAlias[4]
    0x007B 0x00 SlaveAlias[5]
    0x007C 0x00 SlaveAlias[6]
    0x007D 0x00 SlaveAlias[7]
    0x0080 0x00 Reserved
    0x0081 0x00 Reserved
    0x0082 0x00 Reserved
    0x0083 0x00 Reserved
    0x0084 0x00 Reserved
    0x0090 0x00 Reserved
    0x0091 0x00 Reserved
    0x0092 0x00 Reserved
    0x0093 0x00 Reserved
    0x0094 0x00 Reserved
    0x0098 0x00 Reserved
    0x0099 0x00 Reserved
    0x009A 0x00 Reserved
    0x009B 0x00 Reserved
    0x009C 0x00 Reserved
    0x009D 0x00 Reserved
    0x009E 0x00 Reserved
    0x009F 0x00 Reserved
    0x00A0 0x00 Reserved
    0x00A1 0x00 Reserved
    0x00A2 0x00 Reserved
    0x00A3 0x00 Reserved
    0x00C0 0x00 Reserved
    0x00C1 0x00 Reserved
    0x00C2 0x80 Reserved
    0x00C3 0x00 Reserved
    0x00C4 0x28 Reserved
    0x00C5 0x00 Reserved
    0x00C6 0x00 Reserved
    0x00C7 0x60 Reserved
    0x00C8 0x40 Reserved
    0x00C9 0x00 Reserved
    0x00CA 0x00 Reserved
    0x00CB 0x00 Reserved
    0x00CC 0x00 Reserved
    0x00D0 0x00 Reserved
    0x00D1 0x00 Reserved
    0x00D2 0x00 Reserved
    0x00D3 0x00 Reserved
    0x00F0 0x5F HDCP_TX_ID0
    0x00F1 0x55 HDCP_TX_ID1
    0x00F2 0x42 HDCP_TX_ID2
    0x00F3 0x39 HDCP_TX_ID3
    0x00F4 0x32 HDCP_TX_ID4
    0x00F5 0x37 HDCP_TX_ID5
    0x00F6 0x00 Reserved
    0x00F8 0x00 Reserved
    0x00F9 0x00 Reserved

  • 0 in reply to Cathy Cai
    TI__Guru 60595 points

    Hi Cathy,

    thanks for the info. I will review further and get back to you on Tuesday of next week.

    regards,

    Logan

  • 0 in reply to Logan Cummins
    TI__Prodigy 360 points

    Hi Logan,

    Thanks for your support. Looking forward to your replay.

  • +1 in reply to Cathy Cai
    TI__Guru 60595 points

    Hi Cathy, 

    Can you try leaving register 0x21 as default? They are currently programming the WC and CLK pins as local inputs, which might be impacting the I2S output. 

    Regards,
    Logan