DP83822HF: About asynchronous of RMII Receive Timing

Hi Kondo-san,

What is the difference between the setup from the first image to the second image? It looks like the second image shows a much cleaner RX_D0 signal. 

Thank you,

Nikhil

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Nikhil.

1st image's  trigger of oscilloscope is ch2(=clock).

I expected ch2(=clock) and ch1(=data) are synchronous.

But, there are asynchronous in fact.

2nd image is measured just in case to check for noise.

Best regards.

Hi Kondo,

I am looking into your question and will provide additional feedback by tomorrow.

Thank you,

Nikhil

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Kondo,

RX data shall be synchronous to RX_CLK. It appears you may be measuring the 50 MHz reference clock instead, is this the case?

Thank you,

Nikhil

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

Hi Nikhil.

Please tell me RX_CLK and clock.

[Schematic]

I Designed "RMII Slave Signaling".

In that case, RX_CLK is discribed "Unused in RMII Mode" at datasheet's Pin Funtions.

But, RX_CLK is discribed "Optional" at datasheet's Fig 25(RMII Slave Signaling)

What does "optional" mean?

Also, please tell me the following.

 - How to check if DP83822HF is operating in "RMII Slave Signaling" (ex: Read the registers)

 - Is there the register setting of for the clock.

  *I tried to change the register of IOCTRL1(0x0462)'s 14:12bits, however the waveform is not changed.

   => The settings I have tried are 0x000(MAC IF), 0x001(XI Clock) and 0x100(RMII Master Mode)

Best regards.

Hi Kondo,

You are correct, RX_CLK is unused in RMII mode. I was describing that the RX_D[3:0] pins shall be synchronous to RX_CLK (if available), and not the reference clock. "Optional" means that it can be connected to the MAC if desired, but is not required.

You may check register 0x17[7] for the clock setting (25 MHz vs 50 MHz). IOCTRL1(0x0462)'s 14:12bits can be used if RX_D3 is configured as the clock source. Is this the case in your design?

Thank you,

Nikhil

All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).