HI TI,
For DS90UB941 FPD-link interface, can we config the ds90ub941 register to reduce the FPD-link package bit width to increase the PCLK frequency to pair with ds90ub926 and ds90ub928(splitter mode)? Because the total data size transfered from SOC is 960H*480V*24bits*60fps
Thanks
BR
Jason_Gu