• State TI Thinks Resolved
  • Locked Locked
  • Replies 8 replies
  • Answers 4 answers
  • Subscribers 35 subscribers
  • Views 466 views
  • Users 0 members are here
Support feedback
Options
Options
Related

This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS100BR111: register config for 10G operation?

AnBer
Mastermind 30295 points
Part Number: DS100BR111


Team,

For 10G operation the datasheet SNLS338F specifies at page 31 that Register 0x08 register bit 3 need to be set to 1:

-What is then the procedure to enable manually the different channels?
-Do you have some kind of register init sequence or script that can be use to get started for 10G operation?
-Is there for example an init file in the SigCon Architect utility tool that would show a typical register init sequence?

Thanks in advance!

A.

  • 0
    Prodigy 170 points

    Hi,

    I found out, that operation can be enabled again with setting in register 0x01[7:6] = '11' (continuous talk enable channel a / b); but I still do not know, if it is the right way to enable proper operation... because it seems, as if the EQ, DEM settings are not affecting the output, if register 0x08[3] = '1'. I also enabled "output mode control" first (0x08 => 0x04). Can you explain, what is the use of this bit / what is achieved by setting this bit (0x08[3])?

    Thanks for you help in advance!

    Julian

  • 0 in reply to Julian Affholderbach
    TI__Guru* 93570 points

    Hi Julian,

    Output mode control 0x08[4] specifies whether you would want to force IDLE through the register settings or allow the device to go into IDLE mode based on signal detect threshold level.

    0x08[3] = 0 typically. For application >8G, this bit should be set to 1 and manuualy control each channel through reg 0x0C - reg 0x12, reg 0x23(CHA) and reg 0x13 - reg 0x19, reg 0x2D(CHB).

    Regards,, Nasser

  • 0 in reply to Nasser Mohammadi
    Prodigy 170 points

    Hi Nasser,

    thanks for your reply! Can you post the register description of registers 0x0C / 0x13? Unfortunetly it is not explained in the datasheet...

    And I have to correct myself ... I meant, before all changes, I have enabled the registers by writing 0x06[3]  = 1 and not writing int0 register 0x08 the value of 0x04...


    Regards,
    Julian

  • 0 in reply to Julian Affholderbach
    Prodigy 170 points

    We just found out, that our second prototype has a too low input voltage at the redriver input compared to the first one (which is below the signal loss threshold)... so it is not surprising, that the redriver is not working as expected... We try to fix this problem first and I'll get back to you as soon as possible.

    Regards,

    Julian

  • 0 in reply to Julian Affholderbach
    TI__Guru* 93570 points

    Hi Julian,

    Glad to hear you found out the receiver sensitivity level issue. Thanks very much for the update.

    Regards ,, Nasser

  • 0 in reply to Nasser Mohammadi
    Prodigy 170 points

    Hi all,

    we have found out, that there are soldering issues at the connector and some pins do not have a proper connection to the pcb.
    Fortunately not all pcbs have this issue, so we can go on finding the best configuration for our setup.

    But the "problems" described above are still the same:

    If setting the register bit 0x08[3] (for operation above 8Gbps) the output disables and can only be enabled by enabling "continuous talk" (there is no signal los detected at the inputs). This could be the right procedure, but is not explicitly mentioned. So what is the correct way here?

    Second: If we are in this mode (above 8Gbps), no changes on VOD, DEM affect the output, even though the register value changes.

    We can visibly change all parameters, if we do not set this bit (0x08[3]), but because it is mentioned in the datasheet, I would expect some better results at a datarate of 10Gbps. So it would be helpful to know, what this bit does, and how we can change the other parameters in this mode or is it not intended to change the parameters in this mode?

    Many thanks in advance!

    Regards,
    Julian

  • 0 in reply to Julian Affholderbach
    TI__Guru* 93570 points

    Hi Julian,

    Reg 0x08[3] is enabling either linear mode - when it is set to 1'b1 - or limiting mode(when set to 1'b0). In linear mode, VOD or DEM change will not go into effect. For PCIe Gen3 or other protocol - where there is link training - this needs to be enabled. To enable VOD and DEM changes this bit needs to be set to 1'b0.

    Regards ,,Nasser

  • 0 in reply to Nasser Mohammadi
    Prodigy 170 points

    Hi Nasser,

    thank you very much for the explanation what this bit is doing! This helps me finding the best configuration!

    Regards,

    Julian