GPIO4 and GPIO5 can be used for USB D+ and D- charging current identification using the BC1.2 spec. Since these pins will be additional capacitive loads on the USB data lines that can affect signal integrity, I wanted to know the load capacitance of these pins in all relevant states. Mostly, I'm curious to know what the load capacitance will be once BC1.2 handshaking has completed and USB data is being sent between the SoC/MCU/uProc and a PC/host/etc. I could not find this information in the datasheet and I have only been told that these pins will become "high impedance" once BC1.2 handshaking is complete.