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DP83826I: How to configure startup without strapping resistors

Lauren Mayfield
Expert 7905 points
Part Number: DP83826I
Other Parts Discussed in Thread: DP83869

Hi team,

My customer needs some help understanding the strapping resistors for the Ethernet PHY that they are using. They would also appreciate guidance on the best approach to a clean startup without the strapping resistors if they choose not to use them.

They are going to configure the PHY in Enhanced Mode. Per page 6 in the datasheet, the documentation says to leave this NC. They are going to use the chip in RMII Slave Mode, 100BASE-TX mode, with Auto-MDIX enabled. Without strapping, it looks like the device will be configured in MII mode, which is not what they want.

Looking at the DP83826 EVM, pin 28 is Strap4. The datasheet says that it is a PD (PullDown) pin. Figure 14 on page 15 shows the schematic of the EVM. Pin 28 connects to the circuit that includes R56.  What is the purpose of R56?  There is an internal pulldown on this pin and there is no positive driving force in the circuit.  Other components on the sheet are shown as "DNP", so this resistor is supposedly populated.

Assuming they don't want to worry about the strapping resistors, what procedure should they follow to ensure a clean startup? This is what they're thinking-

1. Power is applied.  The RST_N input to the PHY is low (asserted).
2. The microcontroller boots up.
3. The microcontroller turns on the 50 MHz clock for RMII Slave operation. This microcontroller has a clock output for this purpose.
4. The microcontroller deasserts RST_N. They assume the SMI (MDC/MDIO) will not function if the device is in reset (is this true?).

What they are concerned about is the PHY coming to life and negotiating with an external device, only to be reset in order to operate in a different mode. Is it possible to configure the device through its registers before it begins to communicate externally on its RD/TD pins? From the timing diagrams, it appears the 50 MHz clock is needed for the SMI bus to operate, otherwise the device's registers could be programmed before it is able to operate. Is the best approach to deassert the RST_N signal and then quickly program a register that disables the chip? Then program all of the registers and then allow the chip to run?

Thanks,
Lauren

  • 0
    TI__Genius 11725 points

    Hi Lauren,

    To answer your questions:

    • You are correct, ModeSelect pin can be left NC for Enhanced mode.
    • Register access shall not be available during reset. 
    • You are correct, default MAC interface is MII Mode. This can be adjusted through registers after POR or through hardware straps 
      • Hardware bootstrap through RX_D2
        • Mode 0 = MII
        • Mode 1 = RMII
      • Register 0x17[5]
        • 0b = Enable MII mode of operation
        • 1b = Enable RMII mode of operation

    If adjusting the MAC interface through registers, it is recommended to issue a software reset (write register 0x1F = 0x4000) at the end of the script. This will reboot the PHY without erasing the register writes. 

    Please let me know if you have any further questions. 

    Thank you,

    Nikhil

    All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

  • 0 in reply to Nikhil Menon
    TI__Expert 7905 points

    Hi Nikhil,

    Thanks, it helps but not all of their questions were answered. They would like to understand what will happen on the cable side of the PHY at powerup. Will a link be established before software will be able to configure and soft-reset the device? Is the answer on page 29 at the bottom of the page of the datasheet- in that it appears the PWRDN pin should be used to place the chip in powerdown until the processor has time to configure the registers. Is this correct?  Otherwise the PHY will operate and negotiate with whatever it is connected to?

    Can you please get clarification on whether the 50 MHz clock needs to be active in order for SMI to function when PWRDN is asserted? I would also appreciate an answer regarding the EVM schematic - concerning the purpose of R56.

    Thank you!
    Lauren

  • 0 in reply to Lauren Mayfield
    TI__Genius 11725 points

    Hi Lauren,

    Your assessment is correct. After power up, auto-negotiation will occur automatically and link will be established if there is a compatible link partner at the other end of the cable. PWDN can be held low until all register configurations have been made. 50 MHz XI clock will need to be active for any PHY function to be available. 

    Pin 28 can be configured as an LED. When LED pins are used as straps, a parallel pull is required. Unfortunately this info is missed in the DP83826 datasheet, but you may refer to Section 9.5.2 in the DP83869 datasheet. The same concept applies. If not configuring the LED pin as a strap, the parallel pull is not needed and the pin can just be used as an LED, with the series 470 ohm resistor. 

    Which EVM schematic are you referring to? The schematic from the EVM user guide at this link: https://www.ti.com/lit/ug/snlu262/snlu262.pdf?ts=1632331494623&ref_url=https%253A%252F%252Fwww.ti.com%252Fproduct%252FDP83826I ?

    Thank you,

    Nikhil

    All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

  • 0 in reply to Nikhil Menon
    TI__Expert 7905 points

    Hi Nikhil,

    Yes, that is the schematic at the link you shared - the question is regarding R56. What is it's purpose? There is an internal pulldown on this pin and there is no positive driving force in the circuit. Other components on the sheet are shown as "DNP", so this resistor is supposedly populated.

     

  • 0 in reply to Lauren Mayfield
    TI__Genius 11725 points

    Hi Lauren,

    Understood, refer to my comments above on LED straps for R56 purpose: Pin 28 can be configured as an LED. When LED pins are used as straps, a parallel pull is required. Unfortunately this info is missed in the DP83826 datasheet, but you may refer to Section 9.5.2 in the DP83869 datasheet. The same concept applies. If not configuring the LED pin as a strap, the parallel pull is not needed and the pin can just be used as an LED, with the series 470 ohm resistor. 

    Does this fully answer the questions?

    Thank you,

    Nikhil

    All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

  • 0 in reply to Nikhil Menon
    TI__Genius 11725 points

    Hi Lauren,

    Please let me know if you have any further questions. Else, I will close this thread.

    Thank you,

    Nikhil

    All information in this correspondence and in any related correspondence is provided “as is” and “with all faults”, and it is subject to TI’s Important Notice (http://www.ti.com/corp/docs/legal/important-notice.shtml).

  • 0 in reply to Nikhil Menon
    TI__Guru**** 189699 points

    Hi Lauren,

    I will close the thread. Please initiate a new thread as required.

    Regards,

    Sreenivasa