Hello Sir,
I saw power-up sequence section 7.3.1.4 of datasheet page.12 mention "The core power (VDD) must be present and at its minimum high level prior to, or at the same time that, the I/O power (VDD33)".
Is that mean VDD_1.1V must ready before VDD33/VDDA33 and higher than VDD_3.3V when power on ramp up condition?
In our current design, the VDD_3.3V voltage will little higher than VDD_1.1V when power on ramp up, but TUSB9261 function was workable now. Below screen shoot for you reference.
Is there any side effect for our power sequence design? Please kindly give some comment to us. Thanks!!