Part Number: DS90UB934-Q1
Hello Team,
My customer using SoC1 => 933 => 934 => SoC2.
When they measured the VSYNC, HSYNC signal at the SoC2 pin. The H/L logic was inverted compared with their expectation.
Q. Is there any function to invert the VSYNC, HSYNC logic in the 934? I think the FS_POLARTY register is suspicious but I don't understand the function of this register well.
Q. Is there any function to invert the VSYNC, HSYNC logic in the 933?
Thanks,
Yuta Kurimoto
Hello Yuta,
Can you please provide a screenshot of your measurements? (the VSYNC, HSYNC signal at the SoC2 pin and the measurement showing that the H/L logic was inverted compared with their expectation)
Also, can you please check register 0x3B in the DS90UB934 device?
As for your question about "function to invert the VSYNC, HSYNC logic in the 933/934," there are no registers in 933 or 934 for inverting the VSYNC/HSYNC signals.
The frame sync generates a signal that tells the imagers when the frame should start and the FS_POLARITY register indicates which edge of the frame sync signal (rising or falling) means active.
