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PCI2050 - data latched

Newton
Expert 1125 points
Other Parts Discussed in Thread: PCI2050B

For PCI2050b-- is  there  a failure mode where some data was temporarily latched at all f's (at one location)? This is  seen in a system for a few hours.  It's not certain that the PCI2050 was the failing device, but it is in the data path.

 The PCI2050 is used to communicate with a PCI Mezzanine Card.  The erroneous value was reported for few hours.  This value is read through the PCI2050.  After a power cycle , the problem went away.  Other accesses using the PCI2050 seemed to be OK.

 

Any suggestion - why this might be happening?

Thanking in advance

  • 0
    TI__Prodigy 510 points

    Himansu,

    PCI bridge operation is heavily dependent on upstream and downstream device functionality. It is difficult to say if it is possible for the PCI2050  to get into this mode without more info on the operation. Do you have traces of upstream and downstream traffic when the failure occurs? Is it repeatable or was it a one time occurance. How often does it repeat.

  • 0 in reply to DJ Johnson
    Prodigy 10 points

    Hi,

    We are working on a PowerPC MPc7410 based cPCI system. I am using PCI2050 as my pci-pci bridge. We have ported linux 2.6.24 kernel into it.

    When using PCI2050(commercial) the board worked fine. When I have put PCI2050I (both are PDVs) the linux hung while booting. I replaced it with commercial grade version it started working again!

     

    What could be the issue? Please help.

  • 0
    TI__Guru* 76130 points

    Hello,

    There is none errata for this issue on the PCI2050B.

    1) Where are the f's stored? (device, address offset, which device is writing, etc...)

     2) Can you share your schematics and a register dump of the PCI2050B before and after the issue?

    Regards.