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TUSB4020BI-Q1: P1V1 power leakage issue

Part Number: TUSB4020BI-Q1
Other Parts Discussed in Thread: UCD90320

Hi

We observe that P1V1 has leakage.

We already did the test that disconnector(below schematic L26, L27) the P1V1 power source to see P1V1 whether have glitch of voltage on the TUSB4020, It still show up.

Is it possible for the sequence that P3V3 power up faster than P1V1 power cause the leakage?

Schematic:

  • Can you confirm if the hub has any upstream or downstream connections during this test?  Is there voltage on USB_VBUS?  If this was leakage from 3.3V to 1.1V, I would not expect the delay between the ramp of 3.3V and the leakage to 1.1V, I would expect it to occur immediately.  We do not see the same leakage in our lab setup.

    Regards,

    JMMN

  • We didn't has any upstream and downstream connections during the test. USB_VBUS voltage be provided by system 5V divider 90.9k and 10k.

    Do you mean we need ramp up 3.3V and 1.1V on the same time, is that correct?

    And have you suggestion for which voltage of the P3V3 and P1V1 timing is in front?

    Thank you.

    Frank

  • Hi Frank,

    USB_VBUS should not be high unless there is a host connected to the hub, it is possible the voltage is coming from there.

    We recommend 3.3V and 1.1V ramp together or 1.1V ramp before 3.3V if they are using a passive reset circuit.

    Regards,

    JMMN

  • Hi

    If USB_VBUS be high during no any host connected to the hub, could it cause fault?

    Does 1.1V leakage could be a problem? If we are using active reset circuit by UCD90320 and 3.3V ramp up before 1.1V and both voltage stable before deassertion of GRSTz at 3ms.

    Thanks 

  • The leakage should not cause any functional issue and is likely related to the USB_VBUS signal.

    USB_VBUS high at all times could cause interoperability issues since the hub uses it to help determine connect / disconnect.  For USB 2.0, these interop issues are less likely than with USB 3.0 hubs.