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SN65HVD233: CAN bus slope control

rs
Intellectual 881 points
Part Number: SN65HVD233

Can you point me to any resources for determining slope control for CAN bus? I haven't found anything specific to CAN bus but have gathered some rules of thumb from the basics and RS485. Am I missing anything?

For digital signals we can find the rise time from the bandwidth:

BW = 0.35/tr

The rise time here is the 10% to 90% rise time but if we assume we need to get from 0V to Vm during this rise time we can say

S = Vm/tr

So for a 3.3V signal at 1MHz this is suggesting 350ns rise time and a slew rate of 9.4 V/us. I can pick my slope control resistor Rs.

From the TI RS485 Design Guide resources we can calculate a max stub length from the rise time

Lstub <= tr * v * c

Where LStub = maximum stub length (ft)

tr = driver (10/90) rise time (ns)

v = signal velocity of the cable as factor of c

c = speed of light (9.8 x 10^8 ft/s)

My CAN bus is primarily on PWB with some board to board connectors so I'll assume v of the PWB. v = 1 / sqrt(epsilon) and epsilon is 4.4 so v = 0.4767 so:

Lstub <= 163.5 feet.

So as long as my bus nodes meet this stub requirement everything should be ok? Anything else to consider?

  • 0
    TI__Guru 53555 points

    Hi RS,

    For maximum data rate, the slew rate of the transceiver must be fast enough to rise to a valid value early enough in the bit time as you show here. However, faster slopes also contribute more to emissions and are more susceptible to ringing and reflections. The importance of this will change from system to system, so devices with slope control allow for tuning of device behavior to best suit that system. 

    In High-speed mode, SN65HVD233 can support data rates up to 1Mbps. Slope control can be used to help with ringing systems, but will limit this maximum data rate. The impacts here are fairly complex and difficult to account for in calculations, so we recommend an experimental approach for tuning for certain systems. This ensure that all real-life variables such as cable paracitics, stub lengths, connector impedances, and other non-ideal conditions are modeled. 

    Let me know if you would like us to check on any calculations you conduct on top of such experimental data. 

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Intellectual 881 points

    Does the slope control effect the rising and falling edges or just the rising edge?

  • +1 in reply to rs
    TI__Guru 53555 points

    Hi RS,

    Most CAN drivers only actively drive a dominant (logic 0) signal. The recessive signal is sent when the driver is in a passive mode with a weak bias, allowing the bus to come to a common recessive voltage close to 2.5V. 

    So to answer your question, only the recessive-to-dominant edge (1 to 0) is slope controlled. The dominant-to-recessive (0 to 1) is dictated mostly by the RC characteristics of the bus (bus capacitance and termination resistance). 

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Intellectual 881 points

    If one needed to slow down the dominant-to-recessive edge to solve a noise issue what would you recommend? Capacitance in parallel at the termination resistance? Little bit of cap across CANH and CANL at each transceiver?

  • 0 in reply to rs
    TI__Guru 53555 points

    Hi RS,

    This would typically be done by including capacitors to ground on CANH and CANL. I often see these placed near the board connectors to serve the extra function of smoothing transient edges. Typical values for these bus capacitors range from 10pF for large systems to 150pF for very small ones. Examples of these bus capacitors can be seen in the layout example in datasheet Figure 41. 

    It is not too common to need to slow the passive edge for noise reasons, but such capacitors will also help the active edge as well as provide additional bus filtering and slight ESD improvements. 

    Regards,
    Eric Schott

  • 0 in reply to Eric Schott1
    Intellectual 881 points

    Thank you for your insight! One last question... For a bus with more than 2 nodes would you typically see these caps only at the end nodes where the terminations are or at every node?

  • 0 in reply to rs
    TI__Guru 53555 points

    Hi RS,

    Typically bus capacitors would be included at every node to provide filtering and protection for every board. Keep in mind that with multiple boards, the capacitance for each board should be on the lower side of the 10pF - 150pF range to avoid overloading the bus. 

    I hope you find this information helpful!

    Regards,
    Eric Schott