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SN65DSI86EVM: Facing issue with SN65DSI86EVM i2C port

PSG_4
Intellectual 620 points
Part Number: SN65DSI86EVM
Other Parts Discussed in Thread: SN65DSI86

Hi ,

I bought  SN65DSI86EVM for new project and tried to communicate from   host CPU through J16  I2C ports (pins 6& 7). 

But i2C communication failed and noted that I2C clock lines are always low. The REFCLK  =27MHz , VCCIO =1.8V , VCC ,EN pin =logic 1  and VCCA =1.2V are working properly .

I did not connect  MIPI DSI interface as well as  eDP display to EVM. 

Let me know what may the problem with EVM  I2C communication error ?  Is there any hardware settings need to be configured properly  ? 

Is MIPI DSI data and clock is mandatory to connect to SN65DSI86EVM to establish I2C communication ? 

Regards

PSG_4

  • 0
    TI__Guru**** 177776 points

    PSG_4

    The I2C will work with the EVM default configuration. Are you connecting to J10 of the EVM? 

    Pin 1 -> SCL

    Pin 3 -> SDA

    Pin 2 -> GND

    The I2C address is a 7-bit address of 0x2D.

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 620 points

    Hi David,

    I am connecting  Host CPU I2C lines (1.8V logic )  to J16 pin 6 & 7 . As per EVM user manual , we can connect 1.8V level I2C lines to J16. 

    Before connecting to host I2C lines, It is noted that  default value of  I2C clock line connected to SN65DSI86 is always low .

    Is MIPI DSI data and clock is mandatory to connect to SN65DSI86EVM to establish I2C communication ? 

    Regards

    PSG_4

  • 0 in reply to PSG_4
    TI__Guru**** 177776 points

    PSG_4

    The MIPI DSI data and clock is not needed for the EVM to establish the I2C communication. 

    The I2C clock line should have the external pullup pulling it up. 

    What 7-bit I2C address are you using?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 620 points

    Hi David , 

    My SW team used one  I2C application  which can scan all 7 bit address.  This application is able to detect other i2C devices in same I2C bus.  

    Since there is a low voltage level noted in  I2C clock line , I am suspecting about I2C clock stretching which is mentioned in datasheet section :

    " 8.4.5.3.1 Direct Method (Clock Stretching)" 

    >>>>

    The Direct Method (Clock Stretching) involves delaying the acknowledge or data to the I2C Master by the SN65DSI86 driving the SCL pin low. Once the SN65DSI86 is ready to acknowledge an I2C write transaction or return read data for a I2C read transaction, the SN65DSI86 will tri-state the SCL pin therefore allowing the acknowledge cycle to complete.

    >>>>

    Could you please recheck and confirm . 

    Regards

    PSG_4

  • 0 in reply to PSG_4
    TI__Guru**** 177776 points

    PSG_4

    Indirect and direct method only apply to I2C-over-AUX, when you are trying to access the eDP panel through the AUX bus.

    Do you have an external I2C controller that you can use to access the DSI86?

    Thanks

    David

  • 0 in reply to David (ASIC) Liu
    Intellectual 620 points

    Hi David , 

    Actually I had bought 2  nos. of   SN65DSI86EVM.

    I am facing same i2C issue with another   fresh SN65DSI86EVM also . Before connecting to external Host CPU i2C port, It is noted that SN65DSI86EVM  I2C clock by default it is low  (measured at location Resistor R3) . But all other values like REFCLK =27Mhz, VCCIO =1.8V, VCC=VCCA=1.2V , EN =1.8V . 

    Could you please explain why default SN65DSI86EVM  I2C clock pins are low ? 

    Regards

    PSG_4

  • 0 in reply to PSG_4
    Intellectual 620 points

    any update please !!!!

  • 0 in reply to PSG_4
    TI__Guru**** 177776 points

    Hi, 

    I checked my EVM and when nothing is connected to the DSI86 I2C bus, I2C_SCL at R3 is at 1.8V. Can you please send me a picture of the EVM when it is powered up?

    Thanks

    David