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DS92LV2422: deserializer going out of lock

Part Number: DS92LV2422

Hi,

 

We are using the DS92LV2421SQ/NOPB and the DS92LV2422SQE/NOPB device and we are having an issue while running the in BISTEN mode.  What is happening is that about once every 30 to 60 seconds the PLL goes out of lock.  Deserializer LOCK goes low.

 

Attached are pictures of the signals (RIN+/-) going into the deserializer and the ripple on the 1.8V supply of the serializer and deserializer. 

The jitter is shown at 386ps and the ripple is shown at 26mV on the deserializer and less on the serializer, which are in the recommended operating conditions.

Also attached are images of the schematics of both the serializer and deserializer to show the configurations.

 

Why is the deserializer going out of lock?  What can we do to fix it?

 

Thank you,

Elliot

  • Hi Elliot, 

    Can you clarify that during normal operation outside of BIST mode if this also happens?

    Also, can you provide start-up waveforms for the SER and DES, showing each of the 1.8V and 3.3V power rails and PDB signals?

    Can you also provide register dumps of the SER and DES?

    Regards, 

    Logan

  • Thank you Logan, I need to gather these things and get back to you tomorrow with the results.

    Elliot

    1. Can you clarify that during normal operation outside of BIST mode if this also happens?
      1. Yes, this is happening outside of BIST mode too.

    1. Also, can you provide start-up waveforms for the SER and DES, showing each of the 1.8V and 3.3V power rails and PDB signals?
      1. In our design we have the BISTEN of the serializer and the deserializer tied together, so we are going into BIST mode by setting the PDB of the deserializer high and then setting BISTEN of the serializer and deserializer high. So the order would be: 
        1. Serializer power and PDB comes up (see image below Serializer_1.8V_3.3V_PDB)
        2. Deserializer power comes up PDB stays low (see image below DeSerializer_1.8V_3.3V_PDB)
        3. PDB and BISTEN are set high (see image below DeSerializer_PDB_BISTEN)

    1. Can you also provide register dumps of the SER and DES?
      1. Serializer

    0x00

    register

    address

    00

    register

    data

    0x01

    register

    address

    68

    register

    data

    0x02

    register

    address

    00

    register

    data

     b. Deserializer

    0x00

    register

    address

    00

    register

    data

    0x01

    register

    address

    70

    register

    data

    0x02

    register

    address

    00

    register

    data

    0x03

    register

    address

    00

    register

    data

    0x04

    register

    address

    00

    register

    data

     

    Thanks,

    Elliot

  • Hi Elliot, 

    Thanks for the additional information. 

    Please allow me to review this further, and I'll get back to you in the next day or two. 

    Regards, 

    Logan

  • Hi Elliot, 

    Sorry for the delay on this. 

    It looks like all the registers are their default value. Have you experimented with enabling the EQ settings to see if that helps? 

    Have you probed the PASS signal while in BIST mode prior to losing LOCK? Are you observing a high bit error rate? There might not be high enough link margin and the errors eventually cause the lock to be lost. 

    Also, how long is the cable between the SER and DES?

    Can you also provide the layout files? 

    Regards, 

    Logan

  • Hi Logan, I believe we have found the solution to this problem.  We have added some more capacitors to our board on the deserializer power filters.  

    we are now able to run in BIST mode error free.  We got this idea by looking at the eval board.  They have a different filtering scheme there. 

    Thank you for your help.  If we run into any more issues, I'll let you know, but we are good for now!

    Elliot