The DP83867 chip and the PC can successfully implement self-negotiation at 1000 Mbps, but the master cannot communicate over the PHY chip, and the customer has the following test:
1. The master sends fixed-length data to the PHY chip through the MAC interface and the computer can not hear any network packets.
2. When the computer sends a fixed length of data, the master still cannot receive valid data.
3. When the computer network card is manually configured at a rate of 10/100Mbps, the network communication is normal.
4. Observe the GTX_CLK signal of the DP83867 chip with an oscilloscope with a significant -1.24-V DC bias. When the PHY chip is not connected, the controller outputs a DC bias of -0.42V for the GTX_CLK signal.
Attachment 1 : design schematic for the DP83867 chip, with interfaces directly connected to the master MAC.
Attachment 2 : a waveform of the GTX_CLK signal read using an oscilloscope, and the DP83867 chip triple-supply power supply signal.
Attachment 1
Attachment 2
The customer would like to know how to achieve Gigabit Network Rate.
Thanks!
Best Regards,
Cherry Zhou