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DS90UB941AS-Q1: Request for information on registers

Michele Petruccioli
Prodigy 30 points
Part Number: DS90UB941AS-Q1

Hi All,

We are working on DSI registers configuration for DS90B941AS-Q1.

1)What is the unit of measurement for DPHY_TERM_DATA _TIMING register?

2)What is the programmable register for t_CLK_TERM-EN?

3)What is the function and the effect of programming DPHY_BYPASS[4-0]=BYPASS_LP on data reception? 

Thank You

Michele

  • +1
    TI__Mastermind 25765 points

    Hi Michele,

    1. I don't have this information on hand, I will have to double check and get back to you Monday.
    2. This is programming in bits[6:4] of the DPHY_TERM_DATA _TIMING register.
    3. The DS90UH941 device expects a transition from LP to HS to initialize the device. After the initial LP to HS transition, the device can be held in HS mode by running a continuous clock and sending blanking HS packets data inputs instead of transitioning back to LP mode. The initial LP to HS mode transition can be bypassed with register overrides.

    Regards,

    Ben

  • 0 in reply to Ben Dattilo
    TI__Mastermind 25765 points

    Hi Michele,

    Sorry for the wait. See results below:

    DPHY_TERM_DATA_TIMING = 0, TD Term Enable = 10ns

    DPHY_TERM_DATA_TIMING = 1, TD Term Enable = 15ns

    etc.

    So the default is 10ns, then an additional 5ns increase each time the register value is increased

    Regards,

    Ben