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XIO2001: State Value of each SIGNAL

takanobu fukuoka
Prodigy 70 points
Part Number: XIO2001

Hello,

I want to know the reset state and initial state values of each SIGNAL in this IC.

For signals with I / O types "O" and "I / O" except the reset signal (PRST), are the reset state and initial state deasserted or Hi-Z?
Please let me know.

Ex. 1: In case of deassert

Signal Reset State Initial State
PAR L L
IRDY H H
・・・ ・・・ ・・・

Ex. 2: In case of Hi-Z

Signal Reset State Initial State
PAR Hi-Z Hi-Z
IRDY Hi-Z Hi-Z
・・・ ・・・ ・・・

Also, let me ask another question.
Please tell me the reset state and initial state of the following signals.
・RXN
・RXP
・TXN
・TXP
・AD[31:0]

Best Regards,

T. Fukuoka

  • 0
    TI__Guru* 93670 points

    Greetings,

    States of the outputs are divided into different categorys:

    1). Internal pull up/down:
    There signals have internal pull up or pulldown. There are driven as soon as stable power is applied. These include GRST#(pull up) and GPIOs(pullup

    2). External Parts: Data sheet pin function External Parts column, calls for certain settings on some of the I/Os or Outputs. As soon as there is stable supply, these will go into effect.

    3). Open Drain: Some pins such as CLKREQ# & WAKE# are open collector and thus these will go into effect as soon as supply is provided.

    4). PCI signals TXP/TXN. These signals are muted during reset and then would be driven - after PERST#. Please note these require external AC coupling Caps.

    5). PCI Bus Signals for example AD0-AD31, IRDY & PAR. XIO2001 is PCI bus revision 2.3 compatible. Please note a link to this document detailing IO and Output states:
    www.cisl.columbia.edu/.../pci_23.pdf

    Regards ,Nasser