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DP83822I: Internal register behavior when Reset is active

Part Number: DP83822I

Hello team,

I just want to confirm the behavior of Reset.

Are there registers that are not initialized by exception?

Best regards,

Shotaro

  • Hello Shotaro-san,

    All the PHY registers get reset to the default value when resetn is made low.

    --

    Regards,

    Vikram

  • Hello Vikram-san,

    Thank you for supporting. I want to check one more things.

    In 0x041F, resetting from the "Reset terminal" does not seem to work when AVDD is detected as 1.8V.

    (Actually, 3.3V is supplied, but due to the flat region=1.5V before 3.3V supply, PYH is set to 1.8V mode. And by the reset operation, AVDD detection is not changed from 1.8V.)

    Is there a setting that keeps the hold even if the Reset operation is performed other than 0x041F?

    *Regarding the detailed situation, please see the Thread ID:1045072, internal E2E thread.

    Best regards,

    Shotaro

  • Hello Shotaro-san,

    In your current case, x041F's default value is corresponding to 1.8V false detection. Reset from terminal will clean up the value to this default if this is over-written by you. May be better terminology is "value on power-up" and not the default value.

    --

    Regards,

    Vikram