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SN65LVCP114: DDR to SDR

Jan Bock
Intellectual 2830 points
Part Number: SN65LVCP114

Hi Team, 

my customer develops a  Test Board:

The Test Board using FMC+ Connector with total amount of the 116 Single ended IOs
But our design comprise 184 pins.

Most of a pins are used for synchronous buses and can be multiplexed, one part can be transmitted on rising edge and second on the falling edge.

By doing so we can reduce the number of physical pins on board by two 184/2= 92 and solve our connector limitation.

We are currently looking for chip that can convert DDR data bus to two single clock edge busses and vice versa

Do you have an idea how to solve it?

Thanks

Jan

  • +1
    TI__Guru 64326 points

    Hi Jan,

    I do not believe we have a device that will decipher the data being transmit and split the data into two separate data streams. Customer could consider a SERDES solution to help reduce the original pin count however this type of solution will consolidate the data onto one differential pair without separating the two buses.