Hi Team,
I have a question regarding the PCA9548A. How will the device react to the Bus recovery sequence:
1-Send 9 clock pulses on SCL line
2-Ask the master to keep SDA High until the “Slave-Transmitter” releases the SDA line to perform the ACK operation
3-Keeping SDA High during the ACK means that the “Master-Receiver” does not acknowledge the previous byte receive
4-The “Slave-Transmitter” then goes in an idle state
5-The master then sends a STOP command initializing completely the bus
If a port or several ports is open on the PCA9548A it will just pass this commands through right? If not what will happen?
Thanks for the help here.
Bets Regards,
Joe
