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DP83869HM: MII-to-copper guideline

Alex Evdokimov
Prodigy 10 points

Part Number: DP83869HM
Other Parts Discussed in Thread: DP83869EVM, DP83869

Hi.

We want to use DP83869HW ( DP83869EVM for now) in our project. We use STM32F429zi (nucleo board)  with LWIP.

We need  MII 100Mb Full Duplex only.

Straps on EVM-bord ( from SNLA318, page 11) as follow:

PHY_ADDR                        0
1) JTAG_TDO/GPIO_1     open
2) RX_D3                           open
3) RX_D2                           open
4) LED_0                            1
5) LED_1                            1
6) LED_2                            0

After startup we write 0x0060 in 0x01DF. After this, we should start getting PING responses from PC to my MCU.

But we get only LINK indication on my switch (LINK + ACT), but there is no ping.

Tell us please full guideline to make our target config, step-by-step, so we can make it and check REG values and a.t.c.

PS: Due to devbords use, our MII line made from ribbon cable, so we need some MII Loopback test to test this line. Can you please give guideline in this question to?

PS2: where can we get reference C MCU lib on this IC?

Tnx alot!

  • 0
    TI__Genius 16030 points

    We are looking into this but unfortunately there will be delay in response this time. We will get back to you by early next week.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    TI__Genius 16030 points

    Hello Alex,

    Can you please share the block diagram of the entire setup so that we can understand the required data flow? I am not sure where your switch is connected, but when you say that your switch is getting link indication is it reading some PHY register to check link?

    We have following linux driver sample code as reference : https://git.kernel.org/pub/scm/linux/kernel/git/torvalds/linux.git/tree/drivers/net/phy/dp83869.c

    Its porting to required OS has to be done at customer end.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    Prodigy 10 points

    Hello Vikram!

    Our test stand diagram:

    Our stand be like

    Our stripes setup:

    Of photo you can see LED_0 in pos "+", LED_1 in pos "-", LED_2 in pos "+"

    Due to an error in the documentation, the location of the stripes was incorrectly indicated in the first post.

    1) Stripes order in tables are different

    2) But stripe has the same values

    3) Docs numbers.

    Right one stripe order was in SNLU237.

    So we set stripes like:

    PHY_ADDR                        0     (default on evm board)
    1) JTAG_TDO/GPIO_1     open (default on evm board)
    2) RX_D3                           open (default on evm board)
    3) RX_D2                           open (default on evm board)
    4) LED_0                            1
    5) LED_1                            0
    6) LED_2                            1

    About switch:

    we have 100M indication (orange) and don't have green led (1000M) - our stripes set in right pleases ( "Forsed 100M, full duplex. auto MDI")

    About registers:

    We can read/write all regs.

    This is list of all regs from DP83869:

    REG 0x0000 : 0x2100
    REG 0x0001 : 0x794D
    REG 0x0002 : 0x2000
    REG 0x0003 : 0xA0F1
    REG 0x0004 : 0x0181
    REG 0x0005 : 0x0000
    REG 0x0006 : 0x0064
    REG 0x0007 : 0x2001
    REG 0x0008 : 0x0000
    REG 0x0009 : 0x1000
    REG 0x000A : 0x0000
    REG 0x000D : 0x401F
    REG 0x000E : 0x0000
    REG 0x000F : 0xF000
    REG 0x0010 : 0x5008
    REG 0x0011 : 0x6C02
    REG 0x0012 : 0x0000
    REG 0x0013 : 0x0004
    REG 0x0014 : 0x29C7
    REG 0x0015 : 0x0000
    REG 0x0016 : 0x0000
    REG 0x0017 : 0x0040
    REG 0x0018 : 0x6150
    REG 0x0019 : 0x4040
    REG 0x001A : 0x0002
    REG 0x001E : 0x0012
    REG 0x001F : 0x0000
    REG 0x0025 : 0x0480
    REG 0x002C : 0x141F
    REG 0x002D : 0x0000
    REG 0x002E : 0x0221
    REG 0x0031 : 0x10B1
    REG 0x0032 : 0x50D0
    REG 0x0033 : 0x0000
    REG 0x0037 : 0x0000
    REG 0x0039 : 0x0000
    REG 0x003A : 0x0000
    REG 0x0043 : 0x07A0
    REG 0x004F : 0x0200
    REG 0x006E : 0x100A
    REG 0x0086 : 0x0077
    REG 0x0134 : 0x1000
    REG 0x0135 : 0x0000
    REG 0x0170 : 0x0C0F
    REG 0x0180 : 0x0752
    REG 0x0181 : 0xC850
    REG 0x0182 : 0x5326
    REG 0x0183 : 0xA01E
    REG 0x0184 : 0xE976
    REG 0x0185 : 0x19CF
    REG 0x0190 : 0x0000
    REG 0x0191 : 0x0000
    REG 0x0192 : 0x0000
    REG 0x0193 : 0x0000
    REG 0x0194 : 0x0000
    REG 0x0195 : 0x0000
    REG 0x0196 : 0x0000
    REG 0x0197 : 0x0000
    REG 0x0198 : 0x0000
    REG 0x0199 : 0x0000
    REG 0x01A4 : 0x0000
    REG 0x01A5 : 0x0000
    REG 0x01A6 : 0x0000
    REG 0x01DF : 0x0000
    REG 0x01E0 : 0x417A
    REG 0x0C00 : 0x0140
    REG 0x0C01 : 0x6149
    REG 0x0C02 : 0x2000
    REG 0x0C03 : 0xA0F1
    REG 0x0C04 : 0x0020
    REG 0x0C05 : 0x0000
    REG 0x0C06 : 0x0000
    REG 0x0C07 : 0x2001
    REG 0x0C08 : 0x0000
    REG 0x0C18 : 0x01FF
    REG 0x0C19 : 0x0000

    For now, we can't even ping our test stand.

    We need default guideline to config PHY, like 1) write A to reg B, 2) write C to reg B, and so on...

    ----

    Regards,

    Alex

  • 0 in reply to Alex Evdokimov
    TI__Genius 16030 points

    Alex,

    Just to keep you posted : team is looking into it and will come back with reply/further clarifications by tomorrow. Thanks a lot for your patience.

    --

    Regards,

    Vikram

  • 0 in reply to Vikram Sharma
    TI__Genius 16030 points

    Alex,

    You have 869 device linked up with link-partner (0x0001 register indicates that) and problem is either in :

    1. Register configuration for MII mode (as by default using straps PHY will power up in RGMII mode.

    or

    2. Ribbon of cable is distorting the 25MHz signals.

    Register 0x01DF is showing as 0x0000 in your register reads instead of 0x0060. Do you know why this difference in write and read? Can we recheck the correct configuration?

    --

    Regards,

    Vikram