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LMH1228: large jitter spikes on 270Mb SDI, tried to change loop bandwidth and seem to have no effect.

Mike Overton
Prodigy 50 points
Part Number: LMH1228

I have an FPGA driving the LMH1228.   jitter is fine at higher bit rates, but at 270Mb SD it is large.

Most of the SD jitter is reasonable +-250ps, but see occasional spikes to +-600, so the jitter is out of spec.

The spikes seem to occur after periods where there are no data transitions.  So presumable this is the times when the 3FF,000,000 sync byte hits the correct scrambler state to give a flat line output for about 37 bits or 140ns.   But may be something else...  

So I tried to change the loop BW.

These are all in the CTLE/CRD reg page

Set 0x91 to 0x00

Set 0x9B to 0x01

Set 0x9C to 0x00

After each change I did a CDR reset / release with

Write reg 0x0A to 0x0C

Write reg 0x0A to 0x08

None of the changes seems to affect the jitter.  I also tried values larger than the default in all three registers and that seems to have no impact.

The CDR reset does stop the stream, so I am confident I am writing to the correct page...

Has anyone successfully set the loop BW and seen a change?  Am I missing a step?

Has anyone seen this problem on 270Mb streams and found a solution?

  • 0
    TI__Guru* 93670 points

    Hi Mike,

    I had sent you our earlier SD jitter measurement result and we were within the spec. Also, this has not been reported by other customers. We are on holidays and will be back in the office on January 3rd. I can follow up and check into this when we are back in the office. Would this work?

    Regards ,, Nasser

  • 0 in reply to Nasser Mohammadi
    Prodigy 50 points

    We found the problem.  We had been resetting the CDR with CDR page register 0x0A.  When we did this we did not preserve the 0x5 in the upper byte as indicated as reserved in the spec.  Once we corrected the register 0x0A to a 0x50 then the SD jitter was about 220ps.  We did not have to modify the loop bandwidths to get this to work well once we got the correct value in register 0x0A.