This thread has been locked.

If you have a related question, please click the "Ask a related question" button in the top right corner. The newly created question will be automatically linked to this question.

DS90UB947-Q1: different clk

Part Number: DS90UB947-Q1

Hi team,

My customer use SoC>>947>>948>>display, and found that the 947 LVDS input clk is 44.3M(clk+ to gnd), 948 output LVDS clk is 48.9M(clk1+ to gnd), is that normal? If is normal, What is the difference range is normal?

Thanks!

Jiawei

  • Hello Jiawei,

    Not that is not normal. It sounds like a measurement error - are they getting this info from the device registers or from scope measurement? There is no mechanism by which the two clocks can be so far off from eachother but if this measurement is obtained by reading the registers then it makes sense because the clock measurement inside the devices has wide tolerance.

    Best Regards,

    Casey 

  • Hello Casey,

    Thanks for your quickly reply! They got this information from scope measurement. 947 test point is pin 58 & GND, while 948 test point is pin 36 &G= GND. From your said, it should be same. Customer now meet one issue, display will be abnormal when system powered on, but it was different to reoccur.

    I checked 947, 948 power on sequence, it is ok. Do you have advice on this issue? Thanks!

    Jiawei

  • Jiawei,

    Again, is the customer running the 947 init code that we provided to the China auto team? Please confirm that first 

    Best Regards,

    Casey