Hi Team,
Could you kindly help to check 940 SHC review?
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Hi Amelie,
Sure. There are schematic and layout requests ahead of you. I will get back with you by 1/20.
Aaron
Hello Amelie,
here is my feedback to the 940N Schematic review:
- It looks like on all VDDxx pins, the 10uF capacitors are missing. Please refer to figure 38.
- Also make sure that on each VDDxx pin to have a capacitor between 10nF to 100nF directly on each pin.Please refer to figure 38.
- On CAP_I2S pins you just need 1 capacitor with a value between 10nF to 100nF. Please refer to figure 38.
- BISTEN and BISTC pins, If unused, tie to an external pulldown.
- Please make sure to maintain the correct power-up sequence and timing parameters, as per d/s section "9.1 Power-Up Requirements and PDB Pin".
- All GPIOs, If unused, tie to an external pulldown.
- CMLOUT pins, before terminating them, each pin shall be connected through an AC-Coupling capacitor. Please refer to d/s figure 38.
- For MODE_SEL0 & 1, please refer to table 7 and Table 8.
- Pins 49, 64 are reserved pins. May left as No Connect.