TPD6S300A: Layout review question

Jason Ciou

Part Number: TPD6S300A

Hi team,

According to the datasheet layout example
The USB2.0 and SBU lines must be routed as straight as possible and any sharp bends must be minimized.
but my customer SBU line do not straight, is ok with that?

The same situation in D1/D2

over 4 years ago

0 Chuck Branch over 4 years ago

TI__Mastermind 33801 points

Those routes look fine to me.

They just need to be differentially routed and impedance matched to the specifications of the bus interface being used. The SBU lines can be differential and high speed in some cases.

0 Jason Ciou over 4 years ago in reply to Chuck Branch

TI__Expert 3600 points

Hi Chuck,

I heard the high speed signal need to less 5mil, right?

How to check the impedance matched by layout?

Jason

0 Jason Ciou over 4 years ago in reply to Chuck Branch

TI__Expert 3600 points

Hi Chuck,

For CC line,

They use at least 4 via on the trace, do you think this is ok?

Jason

0 Chuck Branch over 4 years ago in reply to Jason Ciou

TI__Mastermind 33801 points

Jason,

Impedance control is done through 2 methods: 1. You configure the PCB layout tool to generate a 90 ohm differential trace using the tool and 2. You can work with your PCB vendor to adjust the board construction to create the target impedance.

The 5mil trace you are describing might be a rule from the PCB vendor. I frequently use 6 and 8 mils, but on some high power boards with very thick copper, I have had to use up to 10mil before.

Regards,

Chuck

0 Jason Ciou over 4 years ago in reply to Chuck Branch

TI__Expert 3600 points

Hi Chuck,
I got it.

For CC trace via, I mention it before, do you have any suggestion?

Jason

0 Chuck Branch over 4 years ago in reply to Jason Ciou

TI__Mastermind 33801 points

Jason,

The CC trace can carry up to 600mA of current as long as they trace and VIA combination does not show too much loss, I don't se any issue with this layout.

Regards,

Chuck

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TPD6S300A: Layout review question