Hello,
Looking at the supply current, Idd11, the test condition list colorbar pattern with the max current of 510mA. It's understood this value was characterized over the free air operating range but was curious at what resolution (pclk rate), single or dual lane mode? The assumption is the pixel clock would impact current consumption of the device, can you confirm this is the case? Does 510mA cover all use cases that display colorbars, i.e. different resolutions and output lanes? We want to ensure the Vdd11 regulator is design correctly.
Thank you,
Alex
