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TUSB4041I: Crystal selection

Part Number: TUSB4041I

Hello,

Wondering if TI provides a service for determining optimal load capacitors on customers board for a given crystal.

Thanks,

John

  • Hi John,

    The load caps are usually specified in the crystal datasheet, can you share it?

    Regards,

    JMMN

  • From SLLSEK3E –JULY 2015–REVISED SEPTEMBER 2017

    8.3.5 Crystal Requirements
    The crystal must be fundamental mode with load capacitance of 12 to 24 pF and frequency stability rating of
    ±100 PPM or better. To ensure proper startup oscillation condition, TI recommends a maximum crystal
    equivalent series resistance (ESR) of 50 Ω. If a crystal source is used, use a parallel load capacitor. The exact
    load capacitance value used depends on the crystal vendor. Refer to application note
    Selection and Specification
    for Crystals for Texas Instruments USB 2.0 Devices
    (SLLA122) for details on how to determine the load
    capacitance value.

    So from SLLA122 referenced above:

    Load Capacitance
    The load capacitance refers to all capacitances in the oscillator feedback loop. It is equal to the
    amount of capacitance seen between the terminals of the crystal in the circuit. For parallel
    resonant mode circuits, the correct load capacitance is necessary to ensure the oscillation of the
    crystal within the expected parameters. It is important to account for all sources of capacitance
    when calculating the correct values for the discrete capacitor components, CL1 and CL2, for a
    design.

    SLLA122
    4 Selection and Specification of Crystals
    xx pF
    To device pin X1 To device pin X2
    X1
    24.000MHz
    1 2
    xx pF
    CL1 CL2
    Figure 1. Parallel Resonant Mode Circuit Sample Schematic
    For a parallel resonant circuit configuration, calculate the discrete capacitor values using:
    CLoad CL1CL2
    CL1 CL2
    CBoard CDevice
    Where:
    Cdevice = the X1 input to X2 output capacitance of the device plus any parasitic capacitances
    (usually 2 pF – 5 pF).
    Cboard = the capacitance of the PCB etch (usually 3 pF – 6 pF).
    CL1 = CL2 = The load capacitors should be of equal value for optimum symmetry. Capacitor
    tolerances in the range of 5% should be sufficiently accurate for these designs.
    If a lower load capacitance than that specified by the crystal specification is used, the oscillation
    frequency of the crystal will increase. If a higher load capacitance than the one specified is used,
    the oscillation frequency of the crystal will decrease. The oscillator of the USB device may have
    difficulty driving a large load capacitance, avoid crystals that specify large load capacitances.

    Paste does not come through very well, in any case, easy for you to look up. So the load capacitors depend on the crystal and the C of the device and the PCB. Some chip vendors have a service where a customer can send them a board with the part, crystal, and load caps on it, and the vendor will run some measurements on the board and determine the optimal load capacitors for the circuit. It does not sound like TI offers that service, but I thought I would check anyway.

    Thanks,

    John