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DP83TG720S-Q1: Circuit check in SGMII application

Richard Yang1
Intellectual 1220 points

Part Number: DP83TG720S-Q1

Hi Team:

   I just checked  the circuit for my customers on DP83TG720S SGMII automotive application , can you help me to make a double check on the circuit , kindly please let me know if you find some problems, thanks very much!

DP83TG720S_circuit.pdf

  • 0
    TI__Mastermind 42765 points

    Hi Richard,

    Thank you for the query. As this is a schematic review, the expected turnaround time is 5 working days. I expect a response by EoD 1/26/22 at the latest.

    Sincerely,

    Gerome

  • 0 in reply to Gerome Cacho
    TI__Mastermind 42765 points

    Hi Richard,

    Attached are my feedback:

    - What is customer doing with VSLEEP pin? Are they utilizing sleep mode? This pin should either be connected to VSLEEP (3.3V) supply if used with sleep mode, or be connected to analog 3.3V.

    - Would recommend having footprints between GND and GND_ENET. Usually have a configuration of 2 resistors and a capacitor in parallel with each other between GNDs. These can be DNP

    - Ensure XTAL meets specs of PHY as denoted in datasheet. Ensure load capacitors on XTAL subcircuit meet vendor specifications

    - Would advise having footprints between XI and XO pins to XTAL if in case series resistors are needed in future. For now these can be 0 ohms

    - Ensure reset pin is normally high during active functionality

    - If sleep mode is used, INH should have a 10k PD resistor. 

    - The LPF on the MDI subcircuit is integrated into the PHY, so an explicit circuit is not needed. Can remove those components

    - Please change C20021 to 4.7nF

    - Looks like SGMII is used. Please ensure 100nF DC blocking caps are used on the SGMII lines. In layout, these should be close to the line's driver.

    - From the schematic, I was able to determine these bootstrapping options:

      + SGMII mode

      + Address 0x0

      + Slave configuration

      + Autonomous mode

    Sincerely,

    Gerome