TFP401A: Configuration when only even pixel used

Hung Ching Hsu

Part Number: TFP401A

Hi Team,

Customer wants to confirm the configuration when only even pixel used for TFP401A.

1. Is it correct to only connect QE[0:7], QE[8:15], QE[16:23] pin and not connect QO[0:7], QO[8:15], QO[16:23] pin if customer wants to use only even pixel?

2. If 1. is correct, datasheet says "Not used, and held low, when in 1-pixel/clock mode." for QO[0:7], QO[8:15], QO[16:23]. Should customer connects these pins directly to GND or better connect to GND through resistor? If resistor is needed, could you tell me the suggestion value for each resistor?

Thanks.

Regards,

over 3 years ago

0 David (ASIC) Liu over 3 years ago

TI__Guru**** 176721 points

The DVI RX output is configurable with pin “PIXS”. When PIXS is Low, RGB data (both odd and even pixel) is output on 24 bits (QE[23:0]). When PIXS is High, RGB data is split odd/even on 48-bits (QO[23:0] & QE[23:0]). You can not use only even pixel for TFP401A.

Thanks

David

0 Hung Ching Hsu over 3 years ago in reply to David (ASIC) Liu

TI__Expert 3086 points

Hi David,

Thank you for the correction.

Customer is using 1-pixel/clock mode and he wants to know how should they handle with QO[23:0] pin when they use 1-pixel/clock mode.

Datasheet says "Not used, and held low, when in 1-pixel/clock mode." for QO[0:7], QO[8:15], QO[16:23]. Should customer connects these pins directly to GND or better connect to GND through resistor? If resistor is needed, could you tell me the suggestion value for each resistor?

Thanks.

Regards,

+1 David (ASIC) Liu over 3 years ago in reply to Hung Ching Hsu

TI__Guru**** 176721 points

Please have unused QO pin tied directly to ground.

Thanks

David

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TFP401A: Configuration when only even pixel used