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TL16C752CI-Q1: Short stop bit errata (sllz058a)

Part Number: TL16C752CI-Q1
Other Parts Discussed in Thread: TL16C754C, TL16C2752, TL16C752C, TL16C752D-Q1

Hello,

Is the errata sllz058a applicable to the TL16C752CI-Q1 device?

Indeed, the errata is not mentioned in itsTechnical documentation section wheras it is for the TL16C752C, TL16C754C and TL16C2752.

In addition, this errata is unclear to me regarding when a stop bit is considered to be "short". Only an example is provided with no detailed explanation of the issue. I understand that the issue may appear when the device receives data at a slightly higher baudrate than its configured value. But can you please indicate a tolerance on the baudrate value which may be supported? Or provide more details on the issue to be able to determine the correct workaround in my application?

Thanks,

Nicolas

  • Is the errata sllz058a applicable to the TL16C752CI-Q1 device?

    Indeed, the errata is not mentioned in itsTechnical documentation section wheras it is for the TL16C752C, TL16C754C and TL16C2752.

    The Q1 version of this device uses the same die as the others you listed (though it may have different materials used for automotive qualification and a different test program).

    I understand that the issue may appear when the device receives data at a slightly higher baudrate than its configured value. But can you please indicate a tolerance on the baudrate value which may be supported? Or provide more details on the issue to be able to determine the correct workaround in my application?

    Unfortunately this device is quite old, we no longer have the design archive for it anymore so we can't run simulations or look at it from a design level to determine the tolerance level of this. From my reading of the errata it seems the main issue is a baud rate mismatch in which the device connected to the TL16C752C device should not have a faster baud rate than our device. The workaround in the errata document suggests intentionally creating a slight baud rate mismatch on the TL16C752C device so that it should have a higher baud rate and sample slightly earlier than the actual desired baud rate. My guess is the designers may have set the sampling to be exactly 1 bit period of the baud rate. The higher oscillation crystal frequency implementation suggested in the document is used to try to minimize the baud rate mismatch between TL16C device and the device connected on the serial side since too much baud rate mismatch would result in signal integrity issues. You'll likely want to try to skew the mismatch to be within 2.5% of the expected worst case difference compared to the connected device. 

    -Bobby

  • Thank you Bobby for your feedback.

    The die being the same, there is no reason why the CI-Q1 version would not exhibit the issue. That's clear to me, thanks.

    I also understand, based on the errata, that the design of the TL16C752 rev. C does not support baud rates higher that is own baudrate setting. As the UART receiver samples incoming data at 16 times the baudrate, I guess that the tolerance on the stop bit is equal to one sample period. I would have appreciated a confirmation of that.

    Anyway, it looks like there is a D version of the TL16C752 which resolved the issue. Do you confirm?

    Does this D version has other differences compared to the C version (additional features, other corrections or enhancements)?

    Also, looking at the datasheet of the TL16C752CI-Q1, the device marking is supposed to be T16C752DQ hich is exactly the same device marking as the one mentionned in the datasheet of the TL16C752D-Q1!Is this an error? I can not imagine that both devices have the exact same making while they have different dies.

    Thanks for your help.

    Nicolas

  • Hi Nicolas,

    It looks like I was incorrect about the 752CI-Q1 device in regards to the die. I believe the TI FAE on your account messaged us internally on your behalf to ask about the top markings of the device. We have system that keeps track of everything related to putting a device together from the die, to the bond wires used, to the markings on top of the package. I went and did a comparison on both the 752D-Q1 to the 752CI-Q1. It seems the 752CI-Q1 does not use the same die as the non Q-1 version but instead uses IP from the D version. This would actually mean that the 752CI-Q1 version doesn't share the short stop bit error.

    Anyway, it looks like there is a D version of the TL16C752 which resolved the issue. Do you confirm?

    Yes.

    Does this D version has other differences compared to the C version (additional features, other corrections or enhancements)?

    From my understanding the reason for a C to D change was solely from a cost of build margin perspective. C version (non-automotive) uses a much older processor technology while the D version uses a more current version of our process technology which in turn helps to save cost from a build perspective. The C version's short stop bit errata was released and revised in 2009 and 2010 while the D version was created from a design perspective in 2014 and released in 2015 so they were aware of the error and were able to resolve it in the D revision. 

    Also, looking at the datasheet of the TL16C752CI-Q1, the device marking is supposed to be T16C752DQ hich is exactly the same device marking as the one mentionned in the datasheet of the TL16C752D-Q1!Is this an error?

    Looking at the system I mentioned in the first portion of this response, I was able to verify both devices have the same top marking. 

    -Bobby

  •  Thank you Bobby,

    I understand that the CI-Q1 version uses the same IP as the D version (which resolves the short stop bit issue) but is manufactuerd in an older technology.

    Everything you indicated makes sense to me and is consistent with the tests we were able to conduct in our lab:

    - the C version we have fails to receive data at baudrate slightly higher (few tenth of %) that its configuered one

    - the CI-Q1 version we tested is able to handle baudrates up to 4% higher that its nominal setting which is what should be expected for an UART

    Things are now clear to me. Many thanks for your help!