TCAN4550-Q1: on-chip specs to design crystal oscillator circuit?

A.

I've assigned this to our TCAN4550-Q1 expert, but I want to make sure you're aware of the TCAN4550 Crystal Oscillator Application note contained in the TCAN4550-Q1 product folder. This application note goes over the design of the oscillator circuit, and includes some of the information you're asking about. You can find the app note here.

Regards,

Eric Hackett 

A.

I see Eric has already provided you the (link) to the Application Note discussing the TCAN4550 crystal oscillator circuit design considerations that need to be made.  As noted in the app note, the typical gm is 6.6 mS, and the pin capacitance is typically 10pF for OSC1 and 9pF for OSC2.  The internal feedback resistance is 500 kΩ.  The oscillator output drive current and output voltage levels will vary with the external load placed between the OSC1 and OSC2 pins including the crystal, load caps and series resistance.  The oscillator circuit is powered by the VIO rail which is either 3.3V or 5V.

The TCAN4550 does require some extra attention because it will also support a single-ended clock and it is monitoring the OSC2 pin for a "grounded" condition using a comparator that has a maximum threshold of 150mV.  If the voltage on the OSC2 pin drops below this threshold, the device may switch to single-ended mode and disable the crystal oscillator amplifier.  Selecting proper load capacitor and series resistor values will ensure the OSC2 voltage level will stay above this threshold and have reliable operation.

Regards,

Jonathan

AnBer,

I would say these estimated calculations are not accurate and are much lower than the actual values.  These calculations rely heavily on the motional parameters of the crystal that need to be provided by the crystal vendor and based on direct measurements. 

The max ESR specified in the datasheet is usually a statistical maximum value that has margin to the actual crystal's motional resistance (Rm).  I have seen that the typical max ESR of 50 is more than 2x higher than a crystal's actual Rm.

Many crystal datasheets don't specify the crystal's shunt capacitance (C0), but this is generally very small.  It does vary by package size and the crystal's frequency, but for a 40MHz crystal, the C0 is typically 1pF or less.

NDK has provided me the motional parameters for the NX201SA-40M-STD-CZS-3 crystal used on the TCAN4550 EVM and in several of the TI designs to use for these calculations and in design simulation models. 

Rm = 19.73 Ω

C0 = 0.7452 pF

I don't have the actual motional parameters for the other crystals used in the TI Designs referenced, but likely they are similar to the NDK and have a Rm and C0 much less than the 50Ω and 3pF estimated values.  Using accurate numbers in the calculations should yield a more accurate GM calculation with a value greater than 5.

Regards,

Jonathan