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SN65DSI84-Q1: Help to check our initial processes

Statham Su
Genius 4990 points
Part Number: SN65DSI84-Q1

Hello Sir:

We are not familiar on SN65DSI84-Q1, would you please help us to check our initial processes as below.

If there has any wrong processes, please let us know.

Thanks a lot.

1. set EN pin to low

2. mdelay(10) ms

3.set EN pin to high

4. fill all register parameters

5. set PLL_EN to enable of 0x0d

6. set soft reset to enable of 0x09

Time sequence:

gpio_direction_output(my_mipi_i2c->gpio_rstn, 0);// EN pull low

  mdelay(10);

        gpio_direction_output(my_mipi_i2c->gpio_rstn, 1); //EN pull high

my_mipi_i2c->mdss_mipi_i2c_client->addr = 0x2D; // IIC address

        HDMI_WriteI2C_Byte(0x09,0x00);//soft reset disable

        HDMI_WriteI2C_Byte(0x0A,0x05);

        HDMI_WriteI2C_Byte(0x0B,0x28);

        HDMI_WriteI2C_Byte(0x0D,0x00);//Set the PLL_EN bit disable

…

   HDMI_WriteI2C_Byte(0x0d,0x01);//Set the PLL_EN enable

mdelay(5);

        HDMI_WriteI2C_Byte(0x09,0x01);//soft reset enable

        mdelay(5);

  • 0
    TI__Guru**** 177081 points

    Hi,

    Please refer to section 7.4.3 Initialization Sequence, the initialization sequence also includes the condition required on the DSI input side.

    Thanks
    David

  • 0 in reply to David (ASIC) Liu
    Genius 4990 points

    Hi David:

    Thanks your recommendations, we have been followed up the table 2 initialization sequence of datasheet.

    But we still have questions as below.

    1. Init seq 6 Set the PLL_EN bit(CSR 0x0D,0), can you let me know which should be 1 or 0?

    2. please refer below test pattern mod, can you let us know when should we add mdelay(10)?

    does it need to add mdelay(10) after HDMI_WriteI2C_Byte(0x0D,0x00)? or after HDMI_WriteI2C_Byte(0x0D,0x01)?

    Please let us know your recommendations.

    Thanks a lot.

    Time sequence:

    mipi_i2c_probe{

    gpio_direction_output(my_mipi_i2c->gpio_rstn, 0);// EN pull low

    mdelay(10);

             gpio_direction_output(my_mipi_i2c->gpio_rstn, 1); //EN pull high

            mdelay(10);

    }

    //test pattern mode

    mdss_mipi_i2c_init_ok(void){

    my_mipi_i2c->mdss_mipi_i2c_client->addr = 0x2D; // IIC address

            HDMI_WriteI2C_Byte(0x09,0x00);//soft reset disable

            HDMI_WriteI2C_Byte(0x0A,0x05);

            HDMI_WriteI2C_Byte(0x0B,0x28);

            HDMI_WriteI2C_Byte(0x0D,0x00);//Set the PLL_EN bit disable

            HDMI_WriteI2C_Byte(0x10,0x26);

            HDMI_WriteI2C_Byte(0x11,0x00);

            HDMI_WriteI2C_Byte(0x12,0x5a);

            HDMI_WriteI2C_Byte(0x13,0x00);

            HDMI_WriteI2C_Byte(0x18,0x6c);

            HDMI_WriteI2C_Byte(0x19,0x00);

            HDMI_WriteI2C_Byte(0x1A,0x03);

            HDMI_WriteI2C_Byte(0x1B,0x00);

            HDMI_WriteI2C_Byte(0x20,0xc0);

            HDMI_WriteI2C_Byte(0x21,0x03);

            HDMI_WriteI2C_Byte(0x22,0x00);

            HDMI_WriteI2C_Byte(0x23,0x00);

            HDMI_WriteI2C_Byte(0x24,0x38);

            HDMI_WriteI2C_Byte(0x25,0x04);

            HDMI_WriteI2C_Byte(0x26,0x00);

            HDMI_WriteI2C_Byte(0x27,0x00);

            HDMI_WriteI2C_Byte(0x28,0x21);

            HDMI_WriteI2C_Byte(0x29,0x00);

            HDMI_WriteI2C_Byte(0x2A,0x00);

            HDMI_WriteI2C_Byte(0x2B,0x00);

            HDMI_WriteI2C_Byte(0x2C,0x0a);

            HDMI_WriteI2C_Byte(0x2D,0x00);

            HDMI_WriteI2C_Byte(0x2E,0x00);

            HDMI_WriteI2C_Byte(0x2F,0x00);

            HDMI_WriteI2C_Byte(0x30,0x05);

            HDMI_WriteI2C_Byte(0x31,0x00);

            HDMI_WriteI2C_Byte(0x32,0x00);

            HDMI_WriteI2C_Byte(0x33,0x00);

            HDMI_WriteI2C_Byte(0x34,0x32);

            HDMI_WriteI2C_Byte(0x35,0x00);

            HDMI_WriteI2C_Byte(0x36,0x0f);

            HDMI_WriteI2C_Byte(0x37,0x00);

            HDMI_WriteI2C_Byte(0x38,0x50);

            HDMI_WriteI2C_Byte(0x39,0x00);

            HDMI_WriteI2C_Byte(0x3A,0x19);

            HDMI_WriteI2C_Byte(0x3B,0x00);

            HDMI_WriteI2C_Byte(0x3C,0x10);

            HDMI_WriteI2C_Byte(0x3D,0x00);

            HDMI_WriteI2C_Byte(0x3E,0x00);

     

            HDMI_WriteI2C_Byte(0x0d,0x01);//Set the PLL_EN enable

            mdelay(5);

            HDMI_WriteI2C_Byte(0x09,0x01);//soft reset enable

            mdelay(5); }

  • 0 in reply to Statham Su
    TI__Guru**** 177081 points

    Hi,

    1. Init seq 6 Set the PLL_EN bit(CSR 0x0D,0), can you let me know which should be 1 or 0?

    Set to 1 to enable the PLL

    2. please refer below test pattern mod, can you let us know when should we add mdelay(10)?

    does it need to add mdelay(10) after HDMI_WriteI2C_Byte(0x0D,0x00)? or after HDMI_WriteI2C_Byte(0x0D,0x01)?

     You want to enable the test pattern after the PLL has been enabled.

    Thanks

    David