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SN65MLVD040: Output collision between DS91M040 and SN65MLVD040

Part Number: SN65MLVD040
Other Parts Discussed in Thread: DS91M040,

Dear Technical Support Team,

If drivers with different characteristics of DS91M040 (former NS product) and SN65MLVD040 (TI product) are mixed, are there any concerns? Not used in Wire’d OR.

Previously, when switching drivers with different characteristics between NS and TI, there was a period when the outputs collided with each other due to the difference in speed characteristics.
(Example: Switch from INPUT1 (made by TI) to INPUT2 (made by NS))
At that time, it was a short time of about 7ns.
If the outputs of DS91M040 (former NS product) and SN65MLVD040 (TI product) collide with each other for a short period of time (about 7ns), are there any problems and considerations regarding transceiver operation and component stress? 

Best Regards,

ttd

  • Hi ttd,

    One questions if there is a switch/mux between both transceivers, how is there bus contention for 7 ns between the two devices. Do you have a simple diagram here? These device are not stressed in this way during characterization I cannot exactly comment on what may happen but I expect data will be corrupted during this time, at least. Over time you most likely would see faulty A/B pins on some units.

  • Hi Malik-san,

    The BUS configuration is a normal multipoint bus connection (Like RS-484), and SWITCH / MUX is not used.
    The transmission switching between units is performed by an external signal, but there is a difference in VOS (SS) (Steady-state common-mode output voltage (A, B)) in a system in which DS91M040 and SN65MLVD040 are mixed. It seems that the VOS (SS) voltage has a transition time of about 7ns at the timing when each driver switches.

    From the M-LVDS standard, my understanding is that the output drivers are designed to be current limited even if the output drivers collide with each other. Therefore, it seems that there is no problem in this case.
    Is there a case that has failed in the past?

    Regards,
    Toshi

  • Hi Toshi,

    We do not have any history of device return failures related to this behavior, but we cannot guarantee that component stress would not occur.

    Regards,

    JMMN

  • Hi JMMN,

    Thank you for your answer.

    Please tell me a little more about the specifications.

    1.  In ABSOLUTE MAXIMUM RATINGS of SN65MLVDS040, Input / Output voltage range A, B: -1.8V to 4V is described.
    I think this means that if the A or B terminal is within this voltage range, it will not break.
    In addition, the Live Insertion (Hot Plugging) on ​​P2-11 of SLLD009, LVDS Application and Data Handbook, has the following description.

       www.ti.com/.../slld009

    "Contention with other drivers on the bus does not damage LVDS or M-LVDS circuits as the standards require output current limiting."

    As long as the above conditions are met, it is considered that there is no failure even if there is a driver collision. Is this correct?
    What are the possible conditions if there is a possibility of failure?

    2. The DS91M040 describes the M-LVDS Output Short Circuit Current Duration as Continuous in the Absolute Maximum Ratings, but the SN65MLVDS040 does not.
    Is the M-LVDS Output Short Circuit Current Duration of the SN65MLVDS040 Continuous?


    Regards,
    Toshi

  • Hi all,

    Can anyone please answer my questions?

    Thanks and regards,
    Toshi

  • Hi Toshi,

    1.  “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum Ratings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions.  Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

    2. The Driver Short-Circuit Test Circuit is the same for both devices.

    Regards,

    JMMN

  • Hi JMMN,

    Thanks a lot for your answer,  and I understand the meaning of “Absolute Maximum Ratings”.

    Best regards,
    Toshi

  • Hi Toshi,

    Let us know if you have additional questions.

    REgards,

    JMMN

  • Hi JMMN,

    Thank you for your support.

    Based on your answers, I answered and explained to the customers their questions and they were convinced.

    I had them show me the waveform of M-LVDS.
    Due to the difference in delay time between the two ICs when ENABALE was turned ON / OFF, for example, when transmission was switched from unit 1 (DS91M040) to unit 2 (SN65MLVD040), there was a section where the outputs overlapped by several ns. Also, the difference in voltage was about 100 mV. The transmission timing is managed by the time-division multiplexing method.

    Since this is not a long-time observation, the customer will check again if it is within the recommended operating range.

    Thanks and Regards,
    Toshi

  • Hi Toshi,

    Those voltages appear to be within the recommended operating levels that will not damage the device.

    Regards,

    JMMN

  • Hi JMMN,

    Thank you for your answer.
    This answer is the most desirable for my customers.

    Best regards,
    Toshi

  • Hi Toshi,

    Very good, have a nice weekend!

    Regards,

    JMMN