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DS90UB948-Q1: eye diagram freq is wrong.

Dai Xinyu
Prodigy 70 points
Part Number: DS90UB948-Q1

We use 941->948 in our project. 4 lanes input and Dual-Link output.

And input 445MHz DSICLK to 941 for 148MHz pclk. So we think the date freq is 148M * 24bps = 3.56GHz. And then one link freq should about 1.8GHz. But we find the freq is 2.4GHz.

Can you help us to analysis it? Why the data freq is wrong?

  • 0
    TI__Mastermind 18046 points

    Hi Xinyu, 

    Would you mind sharing the following register values on the 941? 

    0x4F, 0x5D, 0x5E and 0x5F. 

    Best,

    Shu

  • 0 in reply to Shu Huang
    Prodigy 70 points

    addr: 0x4f data : 0x8c
    addr: 0x5d data : 0x6
    addr: 0x5e data : 0x44
    addr: 0x5f data : 0x96

  • 0 in reply to Dai Xinyu
    TI__Mastermind 18046 points

    Hi Xinyu, 

    I will review the registers and get back to you in 2-3 business days. 

    Best,

    Shu

  • 0 in reply to Shu Huang
    TI__Mastermind 18046 points

    Hi Xinyu, 

    Can you send the register dump for the 948 and show a picture of the set up? IE, where are you measuring and the connection to the scope. 

    Best,

    Shu

  • 0 in reply to Shu Huang
    Prodigy 70 points

    1|bigsur:/ # i2cdump -f -y 2 0xc
            0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
    00: 18 00 00 da 00 00 58 00 00 01 0e 00 17 30 30 00 ?..?..X..??.?00.
    10: 00 00 00 8b 00 00 fe 9e 7f 7f 01 00 0c 00 01 00 ...?..?????.?.?.
    20: 0b 00 25 00 00 00 00 00 01 20 20 a0 00 00 a5 5a ?.%.....? ?..?Z
    30: c0 09 00 05 0c 00 00 00 00 00 00 00 00 00 81 02 ??.??.........??
    40: 04 05 40 00 00 00 00 00 00 00 00 00 00 00 00 8c ??@............?
    50: 16 00 00 00 02 00 00 02 00 00 c9 00 07 06 44 96 ?...?..?..?.??D?
    60: 22 02 00 00 10 00 00 00 00 00 00 00 00 00 20 00 "?..?......... .
    70: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 7f 00 ..............?.
    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    a0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    c0: 00 00 82 00 68 00 00 64 40 00 00 00 00 02 ff 00 ..?.h..d@....??.
    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    e0: 00 00 82 00 68 08 00 00 00 00 00 00 00 02 00 00 ..?.h?.......?..
    f0: 5f 55 42 39 34 31 00 00 00 00 00 00 00 00 00 00 _UB941..........

    bigsur:/ # i2cdump -f -y 2 0x2c
            0 1 2 3 4 5 6 7 8 9 a b c d e f 0123456789abcdef
    00: 58 04 00 f2 fe 1e 00 18 00 00 00 00 00 00 00 00 X?.???.?........
    10: 00 00 00 00 00 00 00 00 00 01 00 00 33 13 50 05 .........?..3?P?
    20: 00 00 40 20 08 00 19 19 11 00 00 00 00 00 00 00 ..@ ?.???.......
    30: 00 00 90 25 01 00 00 8c 00 00 00 00 20 e0 23 00 ..?%?..?.... ?#.
    40: 43 1f 03 00 60 88 00 00 0f 80 00 03 00 00 63 00 C??.`?..??.?..c.
    50: 03 10 00 01 80 00 00 00 00 7f 20 20 00 00 00 00 ??.??....? ....
    60: 00 00 00 00 10 00 00 00 00 b8 00 00 00 00 00 00 ....?....?......
    70: 00 00 00 07 07 08 00 00 00 00 00 00 02 00 00 00 ...???......?...
    80: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    90: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    a0: 00 00 8c 00 00 00 00 00 00 00 00 00 00 00 00 00 ..?.............
    b0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    c0: 00 00 00 00 00 00 00 00 c0 00 00 00 00 00 00 00 ........?.......
    d0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    e0: 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 00 ................
    f0: 5f 55 42 39 34 38 00 00 00 00 00 00 00 00 00 00 _UB948..........

    This is our register dump of 941 and 948. The test point is DOUT like the picture.

  • 0 in reply to Dai Xinyu
    Prodigy 70 points

    anything update?

  • 0 in reply to Dai Xinyu
    TI__Mastermind 18046 points

    Hi Xinyu, 

    The FPD rate on a dual-link 94x device is actually calculated as (PCLK * 35) / 2. Since the 941 register read (0x5F = 0x96) of the PCLK is reading 150MHz the date rate for one link should be ~2.6G. 

    One thing to note is that the deserializer needs to be turned off or disconnected to see the forward channel and that should measure around 1.3GHz. 

    Best,

    Shu