Hi team,
For TFP410, how can I select Adjustable 1.1 V to 1.8 V Input Signal Levels for universal graphics controller interface? Is there consideration when using the 1.8V level?
Thanks a lot
Matthew Chen
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Hi team,
For TFP410, how can I select Adjustable 1.1 V to 1.8 V Input Signal Levels for universal graphics controller interface? Is there consideration when using the 1.8V level?
Thanks a lot
Matthew Chen
VREF should be 0.55v to 0.9v for 1,8v input, nothing special for 1.8v or 1.1v.
Hi Brian,
Do you mean any Vref between 0.55 to 0.9V will make the IC receive 1.8V signal?
Thanks
See section 7.3.2 of the datasheet. VREF determines the switching threshold: Any input voltage below VREF ±0.2 V will be interpreted as a low signal, any voltage above VREF ±0.2 V as high. So VREF should be half of the desired input voltage to maximize the noise margin.
Hi Ladisch,
Thanks,
If the vref is 0.9V, in the low swing mode, will all the signal input pin can receive 1.8V signal from FPGA?
Matthew
Thanks Clemens,
How about the VDD voltage for I2C and MSEN pin? Does it need to be 1.8V?
The MSEN and SCL/SDA pins have open-drain outputs; you can pull them up to any voltage, up to 3.3 V.