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DP83867E: RGMII TX Clock Clock frequency from PHY to MAC

Part Number: DP83867E


Good morning,

I have a 1Gbps ethernet connection available on my board. When my board is stand alone, I see the MAC RGMII TX clock at 125 MHz and PHY RGMII TX clock at 2.5 MHz. 

Once my board is connected to another board via ethernet, then 1Gbps link is established and I see both clocks at 125 MHz. 

Is there any feature in the PHY, even if I configure the PHY to RGMII 1Gbps, if there is no link then it keeps the PHY Tx clock at 2.5 MHz? 

How this link establish process happening in the PHY?

Best regards. 

Onur

  • Hi Onur,

    Thank you for getting in touch with us.

    Your observation is the expected behavior from the PHY.
    Before link-up, the PHY starts to auto-negotiate.

    The auto-negotiation expects the PHY to start from the lowest speed and start to move up in the speed.

    Since the PHY is in 10Mbps mode before auto-negotiation complete, the RGMII RX_CLK(transmitter of PHY) is initially 2.5MHz(corresponding to 10M mode) and switches to 125MHz after auto-negotiation completes.

    Does the MAC see some problem with this behavior?

    --
    Regards,
    Gokul.

  • Hi Onur,

    Please let me know if there the details are sufficient. If so, can you please mark the query resolved?

    --
    Regards,
    Gokul.