Other Parts Discussed in Thread: ALP
Hi team,
In customer project, 983 works in independent link mode, the display content is input in the form of superframe, and output to two screens after filtering and cropping. One is 948, which is connected to 983's OUT0 , the other is 926QSEVB, connected to OUT1 of 983;
the screen of 948 could display normally,
but there are still problems in 926QSEVB, 983 and 926 cannot be LOCK normally, and I2C cannot communicate normally.
Customer tried to use the ALP tool to connect the 926QSEVB. ALP can recognize the 926 normally, but 983 cannot be recognized. Using the ALP tool, the 926 registers can be read and written, and no obvious abnormality was found in the 926 registers; use the ALP tool to configure the 926 output Test pettern, when using the internal source, the PCLK/VS/HS/RGB pin has waveform output, when using the external source, the PCLK is high level (3.3V)
In addition, customer have also tried to use 941(change 983 to 941) to connect 926QSEVB in single link mode, but it can't LOCK normally, and I2C communication also can't work normally.
Based on our previous experience, after a simple setting, we can LOCK between adding and deserializing chips; may I ask if there are any settings to pay attention to in the 926, and if there is any way to debug the problem of not being able to LOCK
