TCA6408A: TCA6408A: State of output port when Vcc-I power is not present? (if \RESET pin is pull to VCCP.)

Hi Hiroaki,

Internally the RESET pin is referenced to the VCCI voltage:

So when VCCI is underpowered the RESET condition will trigger and the device will think it is resetting. While resetting the device will reset the registers to their default states and set all the ports to be inputs.

Why do you need the port to be providing power? Could you attach a weak pull up resistor to the pin that is supposed to be receiving power? This way when the port turns into an input port the pull up resistor will keep the signal high.

Best,

Chris

Thank you. I understand.

I made a mistake because I saw the block diagram and confirmed that VCCP and RESET are input to PowerOnReset.

Certainly, the input threshold of the RESET pin depends on VCCI, so I understand that it will be reset.

The device connected to the Gout pin has a sequence rule that sets the signal Low to High.

If a pull-up resistor is attached, this sequence cannot be satisfied.

Therefore, I would like to take measures by a method other than attaching a pull-up resistor.

I'm considering measures to supply the same power to VCCI and VCCP.(The RESET pin is pull up to VCCI.)

Then, the power supply for the master computer and the I2C pull-up (this power supply may be turned off) will be different from VCCI.

The power supply will be different, but is it okay if they meet the Electrical Characteristics?

Or, Can the difference between VCCI and the master or pull-up power supply(which can be turned off) cause the TCA6408A to malfunction or failure?

I'm sorry I'm have a problem visualizing this set up. If possible can you draw a block diagram with the power supplies labeled so that I cans see what you're talking about.

It sounds like you want to power this device with VCCI and then pull up SCL and SDA to another power supply which can be turned on and off. This would be fine as long as the SCL and SDA pull ups do not exceed the VCCI voltage. This pins are designed to be pulled low while the device still has power on VCCI.

The only thing I would add is that when the SDA/SCL rails get pulled up back to their voltage you should send 9 clock cycles and a stop condition on the bus. This will reset the state machine of all the devices so that you can start communicating from a clear state.

Best,

Chris

Thank you for your reply.

Sorry, Here is block diagrams.

I probably understood from your previous answer.

”This would be fine as long as the SCL and SDA pull ups do not exceed the VCCI voltage.”

I couldn't understand below sentence. Could you explain a little more?
"The only thing I would add is that when the SDA/SCL rails get pulled up back to their voltage you should send 9 clock cycles and a stop condition on the bus. This will reset the state machine of all the devices so that you can start communicating from a clear state."

Best regards,

Hiroaki

Thank you for your reply.

I understand very well.

Thank you for answering many times.