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PCA9546A: Address sequence for slaves

Larry Shaffer
Prodigy 240 points
Part Number: PCA9546A


Hello,

We do not understand exactly how I2C slaves are addressed on the other side of the PCA9546A switch. We understand that you first address the control register on the I2C switch and then enable one or more slave channels. My first question for when you write/read one of the slave channels after it is enabled does the master write only the slave address or is the slave address preceded by the address of the I2C switch for each read/write?

For my second question, will we have an address conflict with the arrangement shown in the attached file?

Regards,

LarryDocument3.docx

  • 0
    TI__Mastermind 26826 points

    Hi Larry,

    Thanks for posting! The PCA9546A behaves as a switch that is controllable by the same I2C bus that it is switching. Unless the PCA9546A is addressed (1110AAA2), it is totally passive to the bus. It is able to connect any combination of the downstream SDx/SCx devices to the bus.

    Thus, if you have the 0x50 device connected to the bus, then yes, this would be a conflict, since you would have both of the 0x50 devices connected to the I2C bus at the same time.

    I noticed in your diagram that you have the PCA9546A connected as a 1:1 switch, rather than a 4:1 switch. Consider this configuration, let me know your thoughts.

    e2e 51-2.docx

    In this configuration, the PCA9546A serves to make sure the two 0x50 devices are not simultaneously connected to the bus. This would resolve the address conflicts.

    Best,

    Danny

  • 0 in reply to Danny Bacic
    Prodigy 240 points

    Hi Danny,

    That answers my questions. Thanks for your prompt reply.

    Regards,

    Larry